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A scalable multi-channel optical regenerative bus architecture based on the use of polymer waveguides is presented for the first time. The architecture offers high-speed interconnection between electrical cards allowing regenerative bus extension with multiple segments and therefore connection of an arbitrary number of cards onto the bus. In a proof-of-principle demonstration, a 4-channel 3-card polymeric bus module is designed and fabricated on standard FR4 substrates. Low insertion losses (≤ −15 dB) and low crosstalk values (< −30 dB) are achieved for the fabricated samples while better than ± 6 µm −1 dB alignment tolerances are obtained. 10 Gb/s data communication with a bit-error-rate (BER) lower than 10−12 is demonstrated for the first time between card interfaces on two different bus modules using a prototype 3R regenerator.
©2012 Optical Society of America
1. Introduction
Optical interconnects have attracted considerable attention in recent years for use in board-level applications such as card-to-card and chip-to-chip communications, owing to the larger bandwidth and reduced power consumption they can offer in comparison to electrical interconnects when operating at high data rates (> 5 Gb/s) [1, 2]. Optical backplanes have received particular interest because of the ever increasing demand for interconnection bandwidth in data centres and supercomputers [3]. Various approaches have been proposed for the formation of such backplanes including free-space optics [4–6], fibre-based solutions [7–9] and polymer waveguide technologies [10–12]. Polymer multimode waveguides are considered a promising candidate as they have the potential of being cost-effectively integrated with electronics onto standard printed circuit boards (PCBs) whilst offering relaxed alignment tolerances in the assembly and packaging of these hybrid opto-electronic systems [13, 14]. Intensive research in recent years in this area has led to the development of numerous system demonstrators deploying different system designs, interconnection architectures, and fabrication methods to achieve cost-effective on-board opto-electronic integration. Interconnection architectures that have been used in such systems include parallel point-to-point optical links [15, 16], meshed waveguide architectures [17] and shared bus topologies [18].
The shared bus architecture in particular, has been widely used in electrical backplane systems, such as blade servers and data storage systems, as it favours applications where communication between a large number of users with short bursts and with high throughput is required. Moreover, the use of a common communication channel allows the connection of a variable number of users (plug and play modules) either on the same bus or on different bus segments interconnected via electrical bridges, thereby offering implementation costs that scale linearly with the number of required users. Nevertheless, electrical backplanes suffer from signal integrity and bus loading issues such as skew, jitter and impedance mismatches, reducing the achievable communication data rates as the number of connected cards increases. As a result, the use of the shared bus architecture in electrical backplane systems has dwindled in recent years. Optical bus topologies however, constitute an attractive alternative for future interconnection systems as they can overcome bus loading issues while offering larger communication bandwidth and reduced power consumption at gigahertz data rates. Various optical bus schemes have been proposed including free-space optics [19], metallic hollow waveguides [20] and polymer waveguides [21]. In all proposed system architectures however, the number of cards that can be connected is limited by the available optical power budget while the system design comprises a single communication channel and it is not readily scalable to higher channel counts. In this paper therefore, we present for the first time a scalable multi-channel regenerative optical bus architecture based on the use of multimode polymer waveguides. The architecture is designed to be compatible with conventional VCSEL and photodiode arrays and ribbon fibres, and allows an arbitrary number of cards to be connected via multiple parallel optical channels. As a proof-of-principle, a 4-channel waveguide architecture is designed and 4-channel 3-card polymeric optical bus modules are fabricated on low-cost FR4 substrates. The optical bus modules exhibit low-loss and low-crosstalk transmission characteristics while achieve robust optical signal distribution even in the presence of input misalignments. 10 Gb/s data communication with a bit-error-rate below 10−12 is demonstrated for the first time between card interfaces on different bus modules via a prototype regenerator unit. In the sections that follow the optical bus architecture and the waveguide design of the polymeric bus modules are described (section 2), the optical transmission characteristics of the fabricated bus modules (section 3), as well as the data transmission experiments (section 4) are reported. Finally, section 5 provides a conclusion.
2. Optical bus architecture and waveguide design
2.1 Optical bus architecture
The proposed backplane interconnection architecture illustrated in Fig. 1 , comprises one polymer optical bus for each signal transmission direction and 3R (re-shape, re-time, re-transmit) regenerator modules to enable the connection of multiple bus segments and therefore, an arbitrary number of cards onto the bus. Each bus segment comprises multiple parallel waveguide channels and has signal outputs (“drop” ports) and signal inputs (“add” ports) at each card connection position. The shared bus architecture is inherently a blocking architecture as only one card can successfully transmit over the common bus in each communication direction at any given time. The operation of such an interconnection architecture relies therefore on the use of efficient communication protocols that implement appropriate collision handling and avoidance schemes to ensure proper bus operation. Each card can use its “drop” port to sense whether the bus is being used and therefore, wait until the bus is available for transmission. The use of a location index for each connected card can allow independent operation of each optical bus in each communication direction: each transmitting card, depending on the location of the desired receiving card, transmits only in the appropriate bus direction, leaving the other bus direction available for use by other cards.
Fig. 1 (a) Illustration of the proposed multi-channel regenerative backplane architecture and (b) schematic diagram of a bus segment showing the main features and the bus repeating unit.
The architecture layout shown in Fig. 1(b), enables the positioning of all optical transmitters (Tx) and receivers (Rx) of each card in close proximity, allowing therefore direct interface of the optical bus with the I/O sections of the electrical cards. The interface between the cards and optical bus can be achieved either with i) optical connections where the optical transceivers are placed on the cards or ii) electrical connections where the optical transceivers are located on the backplane. The use of optical connections is preferred as it provides clear performance advantages but requires the development of appropriate connectorization schemes. Various approaches to implement such optical connectors have been proposed in the literature and have been demonstrated in related system demonstrators including MT-based ribbon fibre or flexible waveguide connectors [22–26], butt-coupled VCSEL sources [13, 14, 27, 28] and micro-mirror structures, either as discrete components or integrated in the optical layer [15, 22, 29, 30]. The use of electrical connections to interface the electrical cards with the optical bus can be a short-term solution until optical connector technologies are standardised. Such a scheme allows the active optical devices and respective drivers to be fixed on the optical bus simplifying therefore the card-bus interface which can be achieved with short high-speed electrical connections (e.g. flex. cables). This paper is focussed however on the interconnection architecture and board-level waveguide layout, leaving the bus connectorization for future development.
2.2 Waveguide layout
The waveguide layout of the bus repeating unit (Fig. 1(b)) is based on the use of passive multimode waveguide components, is designed to be compatible with conventional VCSEL (transmitter-Tx) and photodiode (receiver-Rx) arrays and standard multimode ribbon fibre and can be readily scaled up to a larger number of channels. The signal “drop” and “add” functions are implemented with optical power taps and combiners respectively, while raised-cosine S-bends are used to generate the essential waveguide spacing to accommodate 90° bends with sufficiently large radius for low-loss optical transmission. A schematic of an N-channel M-card bus module is shown in Fig. 2(a) . The use of a larger number of channels results in longer S-bend structures and a larger number of waveguide crossings per channel which have been shown that induce very low additional losses [31].
Fig. 2 (a) Waveguide layout of an N-channel M-card optical bus repeating unit, (b) optical bus link model and (c) number of cards that can be connected to the bus before regeneration is required as a function of the bus optical loss components B and C (P0 = 2 dBm, RS = −13 dBm).
The maximum number of cards, M, that can be connected onto one bus segment before regeneration is required can be found using a simple link model for each channel as shown in Fig. 2(b). The link model takes into account the optical losses in the bus and tap segments (B and C respectively), the tap ratios θi at each “drop” connection, the launched power P0 and the receiver sensitivity RS. In order to maximize to the number of cards that can be connected in each bus segment, a variable tap ratio needs to be used along the bus length [32]. Assuming optimum tap ratios and values for the launched power and sensitivity that match the characteristics of low-cost commercially-available photonic and electronic components, the maximum number of cards M can be found using the worst-case optical path (Fig. 2(c)). Taking into account waveguide component losses based on separate component studies [31,33], the proposed waveguide layout and a realistic optical power budget of 15 dB, the maximum number of cards M that can be accommodated in each bus segment before regeneration is required, is found to be 3.
It is noted that the length of the bus repeating unit shown in Fig. 2(a) depends on the maximum card number M, the radius Rb of the bent sections used for the signal “add” and “drop” functions, and the length Ls of the S-bends of the module and is found to be approximately 2 × (M × Rb + Ls). The width of the module depends on the number of channels N and the bend radius Rb and is approximately N × Rb. It is found that, for M = 3 and for the typical bend radius value of 9 mm used in our polymer waveguide layouts [17], the length of the module exceeds the substrate size that can be deployed in our fabrication facilities (4” substrates in diameter). As a result, an alternative waveguide design which exhibits a reduced module length of M × Rb + 2LS is employed for our proof-of-principle demonstrator (Fig. 3 ). This waveguide layout features exactly the same components as the one in Fig. 2(a), but benefits from the different location of the Tx arrays to achieve a reduced total length in the bus repeating unit.
Fig. 3 (a) Illustration of the implemented backplane architecture and (b) corresponding waveguide layout of the bus repeating unit to achieve a reduced module length.
As a result, a proof-of-principle 4-channel 3-card polymeric bus module based on the layout of Fig. 3(b) is designed (Fig. 4(a) ). The waveguide layout is compatible with 1 × 4 VCSEL and PD arrays and multimode ribbon fibres, comprises 90° crossings, 90° bends, S-bends, optical taps and combiners, and waveguide tapers and fits on a 90 × 50 mm2 substrate. The waveguide design is based on ray tracing simulation tools and experimental studies on similar waveguide components [31, 33]. For both the simulations and experimental studies, launch conditions that match the inputs (VCSEL, MMF launches) likely to be used in a real system, are employed to study the performance of the different waveguide components and assess their variation to input offsets. A more detailed analysis of the design and performance of the multimode waveguide components used in the waveguide layout of the bus module can be found in [33]. Appropriate design parameters are chosen for the various waveguide components to achieve operation of all waveguide paths within the 15 dB power budget target. Variable tap widths are used at each signal “drop” to achieve optimal signal distribution at all bus outputs (Fig. 4(b)). The radius of the 90° bends is chosen to be 9 mm while the length of the S-bends is 26 mm. The waveguide core thickness is assumed to be 50 µm while the pitch of the waveguide arrays at each bus input/output is chosen to be 250 µm to match standard VCSEL/PD array and ribbon fibre spacing.
Fig. 4 (a) Schematic of 4-channel 3-card bus module with port notation and highlighted waveguide paths shown in (d), (b) design details of main bus, (c) images of fabricated waveguide components at noted locations: A: optical tap, B: combiner, C: 90° crossings and (d) photograph of fabricated optical bus module with 2 inputs illuminated with red and green light.
Sample optical bus modules are fabricated from siloxane polymer materials on low-cost FR4 substrates using standard photolithographic techniques. The polymers materials used in this work (OE-4140 and OE-4141) are produced by Dow Corning Co. and have the optical and mechanical properties suitable for the application requirements: they exhibit low loss (~0.04 dB/cm) at the 850 nm operating wavelength and can withstand the high temperature environments (>200°C) associated with PCB soldering and lamination processes [34]. The polymer bottom cladding and core layers are directly spin coated onto the substrate while the waveguide core layer is patterned using a quartz mask and ultraviolet light exposure. A top cladding layer is applied to protect the waveguide structures and planarise the module surface. Finally, the waveguide facets are exposed using a Disco 321 dicing saw. Images of various waveguide bus structures are shown in Fig. 4(c) while a photograph of a fabricated bus module with 2 bus inputs illuminated with red and green light is shown in Fig. 4(d).
3. Optical transmission characteristics
The optical transmission characteristics of the fabricated optical bus modules are investigated under different launch conditions so as to account for the two possible input types: butt-coupled VCSEL arrays and multimode ribbon fibres. Both a butt-coupled 1x4 VCSEL array and a cleaved 50/125 µm graded-index MMF patchcord are used at the bus waveguide inputs to record: (i) the optical path losses, (ii) the induced crosstalk and (iii) the variation of the power splitting at the bus outputs in the presence of input offsets. For all measurements, a 62.5/125 µm MMF patchcord is used to collect the received light at the waveguide outputs while index-matching gel is applied at the waveguide-fibre interface to minimize Fresnel losses and light scattering due to the roughness of the diced facets. At the input side, index-matching gel is applied only for the 50 µm MMF launch measurements.
3.1 Path insertion losses
The optical power received at all respective bus outputs is recorded when light is launched into each bus input and for both input types (VCSEL and 50 µm MMF launch). The insertion loss of each waveguide path is calculated by normalising the received power to the input power and is shown in Fig. 5(a) for all 40 waveguide paths using the waveguide notation in Fig. 4. The majority of the waveguide paths exhibit insertion loss values within or very close to the 15 dB target. Studies on the multimode components [33] and fabricated bus modules indicate that the main loss components in the bus optical paths are the combiner excess losses for the card inputs (~3 dB including the bending losses), the output tapers (~2 dB) and the excess losses of the optical taps (~1-2 dB). High losses (>20 dB) are obtained for the paths of the 1st card output (Rx1, paths 1a, 2b, 3c and 4d) due to inadequate power tapping at the 1st “drop” branch. Further optimisation of the waveguide design and fabrication process is under way and is expected to yield insertion losses for all paths below 15 dB. Achieving lower insertion losses for all paths would also provide the essential power budget margin to mitigate effects such as non-optimal power tapping, input misalignments and modal noise that can have an important impact on the operation of the interconnection links over the optical bus.
Fig. 5 (a) Insertion loss of all waveguide paths and (b) total loss for all bus inputs for a VCSEL and a 50 µm MMF launch. (c) Image of a 1 × 4 VCSEL array butt-coupled with the bus inputs.
The total path loss for each bus input, shown in Fig. 5(b), is also calculated by adding up the power received at all respective bus outputs and normalising the sum to the launched input power. The card inputs (Tx1 and Tx2: paths 5 to 12) exhibit higher losses that the regenerator inputs (Tx3R: paths 1 to 4) due to the presence of two 90° bends and the signal combiner in the optical path. In addition, it can be observed that the VCSEL launches (Fig. 5(c)) result in 1 to 2 dB higher path losses which can be attributed to: (i) increased coupling losses at the waveguide input and (ii) increased component losses due to the larger amount of power coupled into higher order modes at the waveguide input, these being more susceptible to bending, combining and crossing losses. Typically, the output beam of a VCSEL exhibits a larger beam divergence than the output of an index-matched graded-index 50 µm MMF, while the VCSEL far-field profile (i.e. annular ring) favours coupling of more optical power to higher order modes. Separate studies on the multimode components are carried out to minimise the induced excess losses while the application of index-matching gel or epoxy at the VCSEL-waveguide interface is expected to reduce the coupling losses by approximately 0.5 to 1 dB.
3.2 Crosstalk performance
The power received at all other bus outputs is also recorded for all bus inputs and for both input types. The crosstalk values, normalised to the input power, when light is launched into certain bus inputs are shown in Fig. 6 . Most recorded values are below −40 dB, while the worst-case crosstalk occurs for opposite-located Tx and Rx arrays (Fig. 6(c)) with received optical powers on the order of −27 to –30 dB. Assuming a path insertion loss of 15 dB, the worst-case signal-to-interference ratio is found to be −12 dB and −15 dB for a VCSEL and a 50 µm MMF input respectively. Increasing the spacing between cards (Tx/Rx arrays) is expected to significantly reduce the levels of such co-linear crosstalk.
Fig. 6 Normalised (to the input power) received power at all bus outputs when light is launched in various inputs for a (a) VCSEL and a (b) 50 µm MMF launch. (c) Bus module schematic with worst-case crosstalk between opposite-located Tx and Rx arrays highlighted.
Given however, that the bus architecture allows data transmission at any one time by only one user (blocking architecture), only the intra-channel crosstalk is important for the bus operation. The intra-channel crosstalk for each possible link on the bus is therefore estimated using the measured crosstalk values. Assuming a launched power of 1 mW in each one of the 4 channels, the obtained intra-channel crosstalk power values are below <−36 dBm in all cases, yielding an intra-channel signal-to-interference ratio larger than 20 dB.
3.3 Splitting variation to input misalignments
The robustness of the optical signal distribution at the bus outputs in the presence of input misalignments is of significant importance for the bus operation given the multimode nature of the waveguides and the technology requirement for cost-effectiveness in the alignment and assembly of the optoelectronic PCBs. A change in the input launch position redistributes the coupled power among the waveguide modes at the bus input, therefore affecting the power splitting at the optical taps located further along the bus structure. The variation of the power received at all respective bus outputs is therefore studied as the launch position is offset in both the x- and y- directions and for both input types. A variation in the received power at the bus outputs is observed, which is more significant for the output of the first optical tap and becomes more pronounced for vertical offsets. The worst-case values are obtained at the 1st card bus output and are found to be approximately 2 dB (Fig. 7(a) and Fig. 7(b)). The −1 dB alignment tolerances in both transverse directions are also recorded for both input types and bus inputs (card and generator). For a regenerator input, the −1 dB alignment tolerances are found to be approximately ± 10 µm for offsets in both transverse axes (Fig. 7(c)), while for a card input, slightly reduced values of ± 9 µm and ± 7 µm are obtained for a 50 µm MMF and a VCSEL input respectively (Table 1 ). This difference can be attributed to the presence of the 90° bend at the card input.
Fig. 7 (a, b) Normalised (to maximum) received optical power at all respective bus outputs for bus input 2 (regenerator input) as a function of the launch position for a VCSEL input and (c) normalised total received power at all respective bus outputs for the bus input 2 as a function of launch position when a butt-coupled VCSEL array and a 50 µm MMF are used.
Table 1. Measured −1 dB Alignment Tolerances for Transverse Offsets for Each Type of Bus Input (Regenerator-Card) and for Both Launch Conditions (VCSEL and 50 µm MMF Input)
4. Data transmission experiments
An 850 nm VCSEL source and a fibre-coupled high-speed receiver (9 GHz Picometrix PT-12B) are employed to investigate the data transmission characteristics of the fabricated bus modules. For the data transmission experiments, cleaved 50 µm MMF patchcords are used to couple light into and out of the bus waveguides while index-matching gel is applied at both the waveguide input and output facets (Fig. 8(a) ). A 10 Gb/s 27-1 PRBS data signal is used to directly modulate the VCSEL source while a digital communication analyzer (HP 83480A) and a bit-error-rate (BER) tester (Anritsu MP 1763C) are used to record the received eye diagrams and assess the quality of the signal transmission. Open eye diagrams are recorded for the bus paths with insertion losses within the 15 dB target while power penalties below 0.7 dB are obtained for a 10−9 BER. Sample received eye diagrams and recorded BER curves of various optical paths are shown in Fig. 8(b) and Fig. 8(c) respectively.
Fig. 8 (a) Setup for data transmission experiments on optical bus module, (b) sample 10 Gb/s received eye diagrams for optical paths on the bus module with varying insertion losses: P44' = −7.9 dBm, P5e = −12.9 dBm, P7k = −15.8 dBm, P142' = −6.9 dBm (time scale: 20 ps/div) and (c) BER measurement on various optical paths with BER curve of back-to-back link shown for reference.
Finally, a proof-of-principle experiment is carried out to demonstrate the operation of the proposed regenerative backplane architecture using two polymeric optical bus modules and a prototype 3R regenerator unit. The regenerator unit comprises commercially-available electronic ICs to regenerate the data signals (GN2405A and GN2406) and drive the laser and photodiode chips (IPtronics) and a 1 × 4 VCSEL and PD array and is built on a low-cost FR4 substrate. A schematic of the experimental setup used is shown in Fig. 9(a) . Open eye diagrams are obtained for 10 Gb/s data transmission from the card 2 interface (Tx2) of the bus module 1 to the card interfaces 5 (Rx5) and 6 (Rx6) and the input port of the 2nd 3R regenerator unit (Rx3R2) of the bus module 2 (Fig. 9(b)). Moreover, 10 Gb/s data transmission with a BER<10−12 is confirmed using the BER test set for all operating links of the regenerative system. BER measurements are carried out on all the different interconnection configurations through the regenerator unit and are compared with the respective back-to-back configuration comprising only the 2nd bus segment (Fig. 9(c)). The results indicate a power penalty below 0.7 dB for a 10−9 BER for all operating links of the regenerative backplane architecture (Fig. 9(d)).
Fig. 9 (a) Experimental setup for the demonstration of the regenerative backplane architecture using a prototype regenerator module and 2 polymeric bus modules. Operating optical links for input Tx2 are indicated with red lines and a schematic diagram of the 3R regenerator is shown. (b) Received 10 Gb/s eye diagrams at the outputs of the 2nd bus module for the Tx2 input on the 1st bus module (time scale: 20 ps/div). (c) Back-to-back link configuration used as a reference for BER measurements on the regenerative architecture and (d) obtained BER curves for all operating links of the regenerative system.
5. Conclusions
A regenerative multi-channel optical bus architecture based on the use of polymer waveguides is presented for the first time. The architecture, intended for use in backplane applications, is scalable with the number of channels and allows connection of an arbitrary number of cards to the optical bus. As a proof-of-principle, a 4-channel 3-card optical bus module is designed and sample polymeric modules are produced from siloxane materials on low-cost FR4 substrates. Low insertion losses within the 15 dB target are achieved for the majority of the optical paths on the bus module. Further optimisation of the design is under way and will allow all communication paths to be fully functional. Worst-case crosstalk values are approximately −30 dB below launched power, while −1 dB alignment tolerances better than ± 6 µm are demonstrated. 10 Gb/s data transmission with a BER<10−12 is achieved for the optical paths with insertion losses within the 15 dB target. Finally, the principle of operation of the regenerative backplane architecture is demonstrated for the first time, indicating that interconnection between cards connected on different bus segments is possible.
Acknowledgments
The authors gratefully acknowledge Dow Corning Co. for the provision of the polymer materials, the EPSRC for funding the project via the Cambridge Integrated Knowledge Centre (CIKC), the Electronics Development Workshop at the University of Cambridge for the production of the PCB layouts and finally, IPtronics for the provision of the laser and photodiode driver ICs.
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