1. Introduction

Most of the signals in nature are analog, i.e., continuous-time and continuous-level, signals. In contrast, today’s computation and data processing are exclusively performed with digital, i.e., discrete-time and discrete-level, signals. Seamless conversion from the analog domain to the digital domain is, therefore, an essential requirement for high-performance signal processing systems. While digital electronics has recently experienced an explosive growth in terms of speed and storage capacity, the performance of analog-to-digital converters (ADCs) has not experienced such rapid improvement [1,2]. This disparity has reached the point where the interface between the analog and digital domains is the major bottleneck in further advance of mixed-signal communication, computation and sensing systems.

One of the most challenging technical hurdles in current high-performance ADCs is the timing jitter of the sampling clock signals. Today’s state-of-the-art on-chip electronic clocks are constrained to ~100 fs-level timing jitter [2,3], which seriously limits the achievable ADC resolution for higher input frequencies, e.g., above 10 GHz. For example, to implement an 8- bit resolution ADC for 40 GHz input signals, the combined sampling clock jitter and ADC aperture jitter should be ~10 fs or lower. It is extremely challenging to realize this jitter level using purely electronic approaches.

The use of photonic techniques has been regarded as an attractive approach to overcome the timing jitter limitations of purely electronic implementations. In particular, the use of optical pulse trains from mode-locked lasers has long been viewed as a promising way for sampling high-frequency microwave signals due to the ultrashort pulsewidth and ultralow timing jitter [4,5]. Despite their high potential and the extensive research conducted over the last 30 years, as reviewed well in [3], photonic ADCs have demonstrated limited functionalities and/or performances. Although the capability for higher sampling rates by time-stretching [6,7] and parallel processing [8] has been extensively studied, there has been no work that demonstrates photonic ADCs that fully exploit the ultralow timing jitter of optical pulse trains. So far, the best reported result of fully operating photonic ADCs for multi-GHz input signals is 3.5 ENOB resolution at 40 GHz input frequency [9], which was mainly limited by the ~100 fs timing jitter of the mode-locked laser used in that work.

In fact, the timing jitter of optical pulse trains from passively mode-locked solid-state lasers has been theoretically predicted to be even below a femtosecond in the high frequency range [10,11]. In each ultrashort optical pulse, a large number of photons are concentrated in an extremely short pulse (~100 fs or below), which makes it robust against perturbations in timing from noise photons. In the last few years, there has been a remarkable progress in high repetition rate and ultralow noise mode-locked lasers [5,12,13], largely driven by the motivation for high-precision time/frequency control and measurement [14]. Recent high-resolution timing jitter characterization of a commercial passively mode-locked Er-fiber laser has shown that the integrated timing jitter of the optical pulse train is indeed less than 1 fs and 5 fs in the 100 kHz – 10 MHz and the 10 kHz – 10 MHz ranges, respectively [15]. Note that, due to the universal physical mechanism of pulse formation and stabilization, this nearly sub-fs noise performance is not restricted to specific lasers but is generally obtainable from any ultrashort pulse (~100 fs or below) passively mode-locked lasers carefully designed to minimize technical noise sources.

In this paper, we demonstrate a fully operating photonic subsampling ADC that downconverts and digitizes narrowband high-frequency microwave signals. We used ultralow-jitter optical pulse trains from a passively mode-locked Er-fiber laser for subsampling downconversion, the jitter requirement of which is the same as that for the broadband ADC sampling clocks. The measured signal to noise-plus-distortion ratio (SNDR) is 44.3 dB in 2 MHz bandwidth with a 40 GHz carrier frequency, which corresponds to 7.06 ENOB resolution. As discussed later, this measurement result is still limited by the intensity noise and timing jitter of the sampled microwave signal itself rather than the sampling pulse train. The SNDR limited by shot noise and modulator nonlinearities is determined to be 59.9 dB in 2 MHz bandwidth, corresponding to 9.65 ENOB resolution.

2. Principles and operation

The demonstrated photonic ADC (Fig. 1) is based on optical downconversion [16, 17] of a narrowband high-frequency microwave signal by subsampling with an ultralow-jitter optical pulse train, followed by electronic filtering and quantization of the downconverted baseband signal. Prior work on electronic subsampling downconversion (in [18] and the references therein) suffered from low signal-to-noise ratio (SNR) mainly due to aperture jitter of local oscillators. Thus, the key issue of this subsampling ADC is the use of sampling pulse trains for downconversion with much better timing jitter performance than electronic clocks. If an optical pulse source driven by an electronic clock, such as active mode-locked lasers, is employed, the ADC performance is again limited by the quality of the electronic clock used to drive the laser. To overcome this limitation, we employed a purely photonic sampling source, i.e., a passively mode-locked laser. In this work, a 200.2 MHz repetition rate optical pulse train with sub-10 fs timing jitter generated from a passively mode-locked Er-fiber laser [15] is used for sampling and downconversion of high-frequency microwave signals.

 

Fig. 1. Schematic and operation of the photonic subsampling ADC. The optical sampling pulse train (signal a) and the microwave signal (signal b) are convolved in the intensity modulator. The differentially modulated pulse trains (signal c) are applied to the photodiodes. The continuous-time Delta-Sigma modulator inherently filters aliased copies of the narrowband signal at multiples of f _rep, quantizes the baseband signal, and generates a 1-bit digitized output code (signal d). The inset shows the corresponding frequency domain spectrum of each signal labelled.

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Figure 1 shows the schematic and operation of the optical subsampling downconverter and ADC. The first step in this operation is convolving the optical sampling pulse train (signal a in Fig. 1) with the narrowband high-frequency microwave signal (signal b in Fig. 1) in the optical domain. This is done by applying the optical pulse train with a repetition rate frep (200.2 MHz in this work) to a dual-complementary-output intensity modulator driven by the microwave signal that we aim to subsample with a carrier frequency at ~Nf _rep (40.04 GHz in this work, N=200). The two differentially modulated outputs from the modulator result in the suppression of 2nd harmonic distortions and intensity noise [17]. Due to subsampling, the spectrum of the microwave signal is aliased at every harmonic of the repetition rate including at f=0 (baseband) in the frequency domain, as shown in the inset (part c) of Fig. 1. By low-pass filtering the baseband copy, one can downconvert the high-frequency microwave signal to the baseband in the optical domain.

The next step is transferring the downconverted baseband information from the optical domain to the electronic domain. This is achieved by applying the modulated pulse train (signal c in Fig. 1) to photodiodes that are reverse-biased by an on-chip current source, and storing the resulting signal-dependent photocurrent onto a capacitor. This optoelectronic conversion approach is particularly attractive because it precludes the implementation of a sample-and-hold (S/H) network and bypasses switch nonidealities (these switch nonidealities, in fact, severely limited the performance of previous broadband photonic ADCs [6,8,9]). The differential photodiode output also serves as the input stage to the continuous-time (CT) Delta-Sigma modulator [19], which leverages oversampling and quantization noise-shaping to achieve high-resolution digitization of narrowband signals. In the CT Delta-Sigma modulator, aliased copies of the narrowband signal are inherently filtered out while the baseband signal is retained and quantized by a 1-bit resolution ADC operating at a high sampling rate (in this work, matched to the repetition rate of the mode-locked laser used, 200.2 MHz). As illustrated in the inset (part d) in Fig. 1, the noise-shaping of the Delta-Sigma modulator enables higher SNR in the narrow frequency band of interest. By sending the oversampled 1-bit serial stream to a digital filter and digitally re-sampling it by a decimator, the final digitized output is achieved. Note that a free behavioral simulation package for the demonstrated photonic downconverter and ADC is also available online in [20].

3. Experiments

For the demonstration experiment of the subsampling ADC shown in Fig. 1, a commercial 200.2 MHz repetition rate Er-fiber laser (Menlo Systems M-Comb-Custom) is used for generation of the sampling optical pulse train. It generates a train of ~100 fs optical pulses with less than 5 fs timing jitter in the 10 kHz – 2 MHz range (note that the total timing jitter above 2 MHz is below 1 fs) [15]. The pulse train is applied to a dual-output 40-GHz LiNbO₃ Mach-Zehnder intensity modulator (EOSpace AZ-1x2-AV5-40). An average optical power of 5 mW is applied to each photodiode at the modulator output. The photodiodes used are fiber-pigtailed, matched InGaAs p-i-n photodiodes (Hamamatsu G8195).

The CT Delta-Sigma modulator was implemented as a custom IC, and fabricated in the 0.18 µm CMOS process of National Semiconductor. The power consumption of the IC is 47 mW. The CT Delta-Sigma modulator is clocked at 200.2 MHz, which matches with the repetition rate of the mode-locked laser. This clock rate provides an oversampling ratio (OSR) of ~50 over an effective bandwidth of 2 MHz. Note that the bandwidth used (2 MHz) is selected as it is sufficient to fully capture the impact of timing jitter of the sampling pulse train while minimizing the quantization noise contributed by the Delta-Sigma modulator used.

The sampled microwave signal is generated by an Agilent E8267D vector signal generator (VSG) with a 40.039 GHz carrier frequency and -2 dBm power level. The frequency is set to the 200th harmonic of the repetition rate plus ~500 kHz for measuring SNDR and SNR of the downconverted signal over an effective bandwidth of 2 MHz (as shown in Fig. 2). The power levels of the sampled microwave signal and the sampling pulse train are set to optimize the overall SNDR by balancing the shot-noise-limited SNR and the modulator-nonlinearity-limited spurious-free dynamic range (SFDR). For the demonstration of digital modulation, a 1-Mbit/s Gaussian minimum shift keying (GMSK) signal with 40.04 GHz carrier is used.

In addition, to evaluate the SNDR before the Delta-Sigma modulator, we built a separate balanced photodetector by connecting two matched, reverse-biased InGaAs p-i-n photodiodes in series and terminating the mid-point with 50-ohm impedance. This balanced detector enables the measurement of SNDR in the analog domain (before quantization process) while rejecting the impact of intensity noise of the sampling pulse train.

Finally, the SNDR is calculated from the measured frequency domain spectrum by SNDR(dB)=10log₁₀(P_signal/(P_noise+∑_n=2 P _n)), where P_signal is the signal power, P_noise is the noise power integrated over 2 MHz bandwidth, and P_n is the power of the n-th order harmonic distortion component located within 2 MHz bandwidth. The equivalent ENOB is determined by ENOB=(SNDR(dB)–1.76)/6.02. The equivalent sampling jitter Δt is determined by SNR(dB) = 20log₁₀ (1/(2πf ₀Δt)), where f ₀ is the carrier frequency [21].

4. Measurement results

Figure 2(a) shows the baseband measurement results for evaluating the SNDR and ENOB of the subsampling ADC. The SNDR is measured over an effective bandwidth of 2 MHz. The SNDR determined from the fast Fourier transform (FFT) spectrum of the final digitized output (curve A in Fig. 2(a)) is 44.3 dB over 2 MHz, which is equivalent to 7.06 ENOB resolution at 40 GHz. To determine how much noise and harmonic distortions are added in the quantization process, we also measured the radio-frequency (RF) spectrum of the analog signal from the balanced photodetector output (curve B in Fig. 2(a)). The measured SNDR in this case is 45.7 dB in the same bandwidth, which is equivalent to 7.30 ENOB resolution. More higher-order distortions in the FFT spectrum (peaks 1, 2, 3 in Fig. 2(a)) originate from quantization noise limit-cycle oscillations, which are common in low-order Delta-Sigma modulators [19]. The SNR of the RF spectrum (45.8 dB) indicates an equivalent timing jitter of ~20 fs in the sampling process, which is significantly higher than the jitter of the mode-locked laser measured independently [15]. However, this result is consistent with the timing jitter of the sampled 40 GHz microwave signal itself. As indicated in the datasheet of the microwave source used [22], the integrated timing jitter is ~16 fs at 39.8 GHz carrier frequency. In addition, the amplitude noise of the sampled microwave signal is also included as the noise component in this FFT measurement. Thus, the measured noise of curves A and B in Fig. 2(a) is part of the microwave signal, and does not indicate the limitations of sampling pulse trains.

 

Fig. 2. (a). SNDR measurement result. Curve A, the FFT spectrum of the digitized output (SNDR=44.3 dB); curve B, the RF spectrum of the analog signal from the balanced photodetector (SNDR=45.7 dB); curve C, the RF spectrum of the shot noise limited performance (SNDR=59.9 dB). Peaks 1, 2 and 3 indicate the 2nd, 3rd and 4th order distortions of the FFT spectrum, respectively. Peak 4 indicates the 2nd order distortion of the RF spectrum (higher order distortions are below the noise floor). The peak frequencies of curves A and B are slightly detuned for visual clarity in this plot. The resolution bandwidth is 2 kHz. (b) Digital modulation result. Curve A, the FFT spectrum of the digitized output; curve B, the RF spectrum of the analog signal from the balanced photodetector; inset, the eye diagrams constructed from the digitized output. A 1 Mbit/s GMSK-modulated signal at 40.04 GHz carrier frequency is applied to the intensity modulator. The resolution bandwidth is 2 kHz.

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To evaluate the SNDR fundamentally limited by the shot noise of the photocurrent and the modulator nonlinearities, we measured the RF spectrum of the output from the balanced photodetector after turning off the microwave source (curve C in Fig. 2(a)). The ideal SNDR limited by the shot noise and the modulator nonlinearities is determined to be 59.9 dB. This is the limit for the current subsampling ADC set by the shot noise and the modulator nonlinearities that can be achieved when the timing jitter from the optical pulse train is less than ~4 fs. The projected SNDR corresponds to 9.65 ENOB resolution in 2 MHz bandwidth. Provided a higher quality microwave signal to be sampled, this ADC can resolve narrowband microwave signals at 40 GHz with higher than 9-bit resolution.

To validate the full ADC operation, we applied a 1 Mbit/s GMSK-modulated signal at a 40.04 GHz carrier frequency to the intensity modulator. Figure 2(b) summarizes the measurement results for the digital modulation – the FFT spectrum of the digitized output (curve A), the RF spectrum of the analog signal from the balanced photodetector (curve B), and the resulting eye patterns from the digitized output (inset). The wide open eyes clearly indicate that the optical downconversion as well as electronic quantization can successfully reconstruct the digital-modulated signal at a carrier frequency as high as 40 GHz.

5. Discussion and outlook

In summary, using low-jitter optical pulse trains from an Er-fiber laser, we have demonstrated subsampling downconversion and analog-to-digital conversion of 40-GHz microwave signals with higher than 7 ENOB resolution in 2 MHz bandwidth.

The bandwidth can be scaled up by using higher repetition rate mode-locked lasers and higher order Delta-Sigma modulators. For example, optical pulse trains with GHz repetition rate and ~10 fs (or lower) timing jitter have been demonstrated either directly from short-cavity waveguide lasers [12] or by external repetition rate multiplication [23]. Third-order CT Delta-Sigma ADCs with 20 MHz bandwidth and 74 dB SNDR have also been demonstrated [24]. Therefore, the scaling of bandwidth to 20 MHz or higher with shot-noise limited performance is feasible with currently available mode-locked lasers and Delta-Sigma ADCs. When the SNR is shot-noise limited and the timing jitter of the optical pulse trains is less than 4 fs, the achievable ENOB at 40 GHz carrier frequency is 9.65 and 8 for 2 MHz and 20 MHz bandwidth, respectively. Note that the ADC architecture presented in this paper is optimized for downconverting and digitizing a narrowband microwave signal at a very high carrier frequency (e.g., 40 GHz or higher). The scaling of bandwidth up to the full Nyquist bandwidth will require a different ADC architecture based on parallel processing such as a timeinterleaved wavelength division multiplexing (WDM) scheme [25]. For such broadband photonic ADCs, the use of ultra-low jitter optical sampling pulse trains is again one of the most crucial requirements for achieving high resolution at higher than 40 Gsamples/s sampling rate.

The photonic subsampling ADC presented in this paper can be used for high-resolution digitization of high-frequency narrowband microwave signals, ranging from scientific instrumentation for the diagnostics of high-quality microwave signals (for example, microwave signals used for driving particle accelerators or generated from optical atomic clocks) to commercial applications in radar and communication systems. More importantly, the result shows that the optical sampling based on ultralow-jitter optical pulse trains can overcome the sampling clock jitter constraints of high-performance ADCs. The rapidly growing field of silicon photonics [26,27] will enable the integration of major optoelectronic components such as mode-locked lasers [28,29], high-speed modulators [30-33] and photodiodes [34,35] on a silicon-based complementary metal-oxide-semiconductor (CMOS) platform, which promises a full implementation of high-performance photonic ADCs on a silicon chip in the near future.