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Abstract
We demonstrate a co-designed optical receiver, which is hybrid-integrated with a silicon-photonic photodetector (PD) and silicon-germanium (SiGe) trans-impedance amplifier (TIA). Accurate equivalent circuit models of PD and electrical parasitic of chip-on-board (COB) assembly are built for co-simulation with TIA. Inductive peaking and equalizer (EQ) techniques are proposed in the design of TIA to extend the bandwidth of the optical receiver. The measured electrical 3-dB bandwidth of TIA and optical-to-electrical (O-E) 3-dB bandwidth of optical receiver are above 36.8 GHz and 36 GHz, respectively. For the optical receiver, clear eye diagrams up to a data rate of 80 Gbit/s are realized. The bit-error ratios (BER) for the NRZ signal with a different bit rate and received optical power are experimentally measured, and 100 Gbit/s NRZ operation is successfully achieved with a soft-decision forward error correction (SD-FEC) threshold.
© 2021 Optical Society of America under the terms of the OSA Open Access Publishing Agreement
1. Introduction
With explosive growth of the data traffic, capacity enhancement for a single channel in the optical transceiver is always desired [1,2]. It’s essential to develop high bandwidth optical components and electrical devices both in transmitter and receiver to realize high speed transmission. The performance of optical receiver mainly depends on the property of photodiode (PD) and trans-impedance amplifier (TIA). High bandwidth PD [3–5] as well as high speed TIA [6–9] were reported. However, most of them only focused on the design of PD or TIA individually. In order to further improve the performance of high-speed optical receiver, co-design of the optical receiver is an efficient method.
Some of co-designed optical receivers operating below 50 Gbit/s were demonstrated [10–14]. In order to realize optical receivers with the data rate beyond 50 Gbit/s, comprehensive consideration of the PD, TIA and parasitic of assembly is required. Co-simulation with redundancy designs, which employ the equivalent circuit of PD and parasitic in design of TIA, can optimize overall performance of hybrid-integrated optical receiver. In [15] a balanced PD which was co-designed with a differential TIA, could operate up to 54 Gbit/s. A 90 Gbit/s NRZ optical receiver was also present based on fully differential transimpedance amplifier [16]. But these works which adopt the differential topology, make the optical receiver complex.
In this paper, a 100 Gbit/s NRZ optical receiver in chip-on-board (COB) assembly is present, which integrates a silicon photonic PD and a silicon-germanium (SiGe) TIA. In order to characterize the property of PD, accurate equivalent circuit model of PD is built and co-simulation of PD equivalent circuit model, TIA circuit and parasitic in assembly is realized. Bandwidth extension technology such as inductive peaking and equalizer (EQ) circuit, are employed in the TIA circuit. Small signal electrical performance of TIA, together with small signal optical-to-electrical (O-E) performance of PD and optical receiver are measured. For both of TIA and optical receiver, clear open NRZ eye diagrams at 80 Gbit/s are achieved. 100 Gbit/s NRZ signal detection is achieved with the bit-error ratios (BER) below forward error correction (FEC) threshold of 2.0×10−2.
2. Proposed PD and TIA
2.1 Proposed PD
The silicon photonics PD has a vertical PIN diode structure on N-doping 220-nm-thickness silicon layer. The P-doping is set on the top of the germanium layer with thickness of 500 nm. For the proposed PD with photosensitive area of 4 × 20 µm2, the test results show that the responsivity is 0.75 A/W and dark current is smaller than 10 nA.
The property of PD can be divided into two parts. The first one is O-E response, which can be described with Verilog-A [17,18]. Another one is frequency response, which is characterized with equivalent circuit [19,20]. In order to acquire optimized design of optical receiver, co-design with accurate equivalent circuit model of PD is required [21]. Figure 1(a) shows the equivalent circuit of PD. Ipd represents the current of PD, Cj represents the junction capacitance of PD, Cpad represents the capacitance of pad. Cox and Rsub represent the substrate capacitance and resistance of PD. The values of these parameters can be extracted by fitting measured and simulated S-parameter. The S-parameter from 100 MHz to 67 GHz are measured with a 67 GHz RF probe and Keysight lightwave component analyzer (LCA) N4373D. A 65 GHz bias tee is used to provide bias voltage for PD. The LCA and high-speed RF path are calibrated before testing. Figure 1(b) shows the fitting result of reflection coefficient S11 between measurement and simulation from 100 MHZ to 67 GHz. While the PD is wire-bonded and DC coupled with TIA in the optical receiver, the actual reverse bias of PD is 2.1 V. At the reverse bias of 2.1 V, the extracted values for Cj, Rs, Cpad, Cox and Rsub are concluded as 35 fF, 20 Ω, 10 fF, 12 fF and 8000 Ω. The silicon photonics PD exhibits small capacitance, it is beneficial to realize high-speed hybrid integration. With accurate equivalent circuit model, the matched design of TIA can be proposed.
Fig. 1. (a) The equivalent circuit model of PD. (b) The fitting result of reflection coefficient S11 between measurement and simulation from 100 MHz to 67 GHz.
2.2 Proposed TIA
The top block diagram of the proposed TIA is shown as in Fig. 2. It consists of single to differential (S2D) transimpedance amplifier, two stages of CML (current-mode logic) amplifier, output buffer, receiver signal strength indicator (RSSI) circuit, and DC offset compensation (DCOC) circuit.
The input current signal feeds into the transimpedance stage through the pin of RFIN. A dummy TIA generates reference to implement the single-ended to differential. The DC overload circuit is proposed to absorb the DC component of input signal. A low dropout regulator feeds TIA and dummy TIA to provide a constant supply [22]. The output of the transimpedance stage is amplified by two stages of CML amplifier, which provide 19 dB gain. Then the buffer provides 0.5 dB gain and drivers 50 Ω output. DC offset between differential outputs of buffer is cancelled by the DCOC circuit. The RSSI circuit which connect to the cathode of PD in the optical receiver, can provide the bias voltage of 3 V for PD through pin of CATH. And the DC voltage at the input of TIA which connect to the anode of PD, is 0.9 V. The actual reverse bias of PD is 2.1 V. This is the reason we purposely extract the parameter of PD’s equivalent circuit model under the bias of 2.1 V previously. Moreover, the RSSI circuit also can detect the photocurrent of PD in the optical receiver, it is beneficial to hybrid integration. Based on the equivalent circuit model of PD and TIA circuits, the co-simulation can be realized.
3. Co-design of the optical receiver
Accurate co-simulation of PD and TIA are necessary for high-speed optical receiver design. The current of PD is converted to voltage and amplified by the TIA. RSSI circuit of TIA provides bias voltage for PD. In the COB assembly, PD and TIA which are placed as near as possible, are connected with two bonding wires.
Co-simulation environment takes everything into consideration to realize high gain, high bandwidth optical receiver. The co-simulation schematic of PD and transimpedance stage is depicted in Fig. 3. The electrical behavior of PD is characterized with the equivalent circuit model described in last paragraph. Cpad is the bonding pad capacitance of PD. The bonding wire between anode of PD and pad RFIN of TIA, can provide series inductive peaking and extend the bandwidth of the optical receiver. Considering the structure of COB assembly and manufacturing variation, bonding wire with length of 350 µm and height of 80 µm is chosen. The model of bonding wire is carefully valued with electromagnetic simulation. L1/L3 and L2/L4 indicate the inductance of bonding wire, C1/C2 denote the parasitic capacitance of bonding wire.
The transimpedance stage which is the main factor in the co-design of optical receiver, is chosen as shunt feedback topology, because of its advantage in noise performance. Bipolar transistors of Q1 and Q2, together with resistor of RC are referred as a common emitter amplifier. Resistor RE, coupled with transistors of Q3 and Q4 denote the emitter follower. Rf is the feedback resistor. Transistor of M1 is used to absorb the DC component of PD photocurrent signal. Cpad1 is the bonding pad capacitance of TIA. The bandwidth of co-designed optical receiver is limited at the input node of TIA by the total capacitance, which is mainly dominated by the TIA capacitance and photodiode capacitance, including the junction capacitance and pad capacitance. Series inductor Ls is utilized to bandwidth extension. Small and large inductor which can cause bandwidth and damping problem [23,24]. The value of inductor is carefully designed to realize a Butterworth response, which can achieve a maximally flat passband. For the ideal shunt-feedback transimpedance amplifier with Butterworth response, the series peaking inductor Ls,peaking can be approximately expressed as the following equation [25]
Where Rf is the feedback resistor of TIA, CPD is the total output capacitance of PD, CTIA is the total input capacitance of TIA, A0 is the gain of common emitter amplifier.
In the co-design of optical receiver, bonding wire and series inductor Ls which serve as the series peaking inductor, break up the capacitances of PD and TIA to improve the bandwidth further.
The tolerance of the assembly is another significant influence for the performance of high-speed receiver. In order to realize variable peaking to compensate the propagation loss, the degeneration capacitances which are referred as EQ circuits, are proposed in the CML amplifier and output buffer. Especially, array of degeneration capacitance which is adopted in the output buffer stage of TIA, can provide variable peaking of 0 to 3 dB by manual control a 6-bit DAC. So as to aim at high speed optical receiver, we try to realize high bandwidth with compromising transimpedance gain partly. Figure 4 shows the simulation result of co-designed optical receiver, the transimpedance is 65.2 dBΩ and 3-dB bandwidth is 38.7 GHz. With the tunable EQ, the 3-dB bandwidth can be enhanced to 44.3 GHz. It’s sufficient to compensate the influence of the assembly.
4. Measurement setups and results
4.1 Chip micrograph and measurement setups
The TIA is designed and fabricated based on 180 nm SiGe BiCMOS technology, with cutoff frequency of 220 GHz and collect-emitter breakdown voltage of 2 V. The chip occupies an area of 1.5 × 2.6 mm2. The small signal performance of PD, TIA and optical receiver are evaluated separately. The PD is measured with probe, while the TIA and optical receiver are tested based on the COB package.
The influence of parasitic in hybrid integration has been fully considered in section 3. The COB package is carefully assembled based on the simulation model. For the connection between PD and TIA, the bonding wires are programed with the automatic gold wire pressure welding machine and established with length of 350 µm and height of 80 µm. Figure 5(a) and (b) show the COB photograph of TIA and optical receiver.
Fig. 5. (a) Micrograph of the designed TIA in COB assembly. (b) Micrograph of the proposed optical receiver including TIA and PD, the channel measured is highlighted. (c) Experimental setup for the measurement of the O-E response. DUT: the device under test is optical receiver consisting of PD and TIA.
By using Keysight LCA N4373D, the electrical bandwidth of TIA, as well as bandwidth of PD and optical receiver are measured.
Figure 5(c) shows the measurement setup, which is adopted to characterize the output eye diagrams of TIA and optical receiver. For TIA measurement, Keysight arbitrary waveform generator (AWG) M8194A is used to output different bit rate NRZ signal and directly connects to the TIA. Keysight sampling oscilloscope N1000A collect the output of TIA. For optical receiver measurement, the output signals of Keysight AWG M8194A, are amplified by the driver (SHF S807) and sent to a Mach-Zehnder modulator (MZM), which modulate the CW light emission from a laser at 1550 nm. A variable optical attenuator (VOA) is proposed to tune the power of received signal, which are fed into the proposed optical receiver to realize optical-to-electrical conversion. The output of optical receiver is connected to a real-time Keysight oscillator scope UXR0704A operating at 256 GS/s. And off-line DSP are processed to calculate the BER. The power consumption per channel is 346 mW with the supply voltage of 3.3 V.
4.2 Small-signal performance
Using Keysight N4373D, the electrical S-parameters of TIA, as well as O-E S-parameters of PD and optical receiver are tested.
Figure 6(a) shows the results of S-parameters, including the transmission loss of COB. The 3-dB O-E bandwidth of PD and optical receiver is above 32.6 GHz and 31.5 GHz. Based on the S-parameters of TIA, the transimpedance gain of TIA can be calculated using the following equation [26]:
where Z0 is 50 Ω. The 3-dB bandwidth of 36.8 GHz with transimpedance of 62 dBΩ can be concluded. The measured transimpedance and bandwidth is lower than the simulation results, it’s attribute to the influence of COB package and measurement setup.Fig. 6. Experiment results of small signal performance (a) Measured electrical S21 of TIA, as well as measured O-E S21 of PD and optical receivers. (b) Measured O-E frequency response of optical receiver with the tunable EQ.
With the tunable EQ in TIA, the frequency peaking can be implemented to enhance the bandwidth of TIA and optical receiver. Figure 6(b) illustrates frequency response of optical receiver. The 3-dB bandwidth of optical receiver can be extended from 31.5 GHz to 36 GHz by tuning the EQ.
4.3 Large-signal measurements
Electrical measurements of eye diagram are done to confirm the response of TIA. The Keysight AWG M9502A produces PRBS (pseudo-random bit sequence) with length of 211−1 and feeds into the TIA. Figure 7 demonstrates the measured NRZ eye diagram of TIA at 50, 60, 70, 80 Gbit/s. Clear opening of eye diagrams is realized, with the eye amplitude of 155 mV and 89 mV at 50 Gbit/s and 80 Gbit/s, respectively.
Fig. 7. Measured NRZ eye diagrams of TIA at (a) 50 Gbit/s, (b) 60 Gbit/s, (c) 70 Gbit/s, (d) 80 Gbit/s.
The eye diagrams of optical receiver are realized by applying the measurement setup described in Fig. 5(c). The PRBS pattern data with length of 211−1 is applied to verify the performance of optical receiver. Figure 8 shows the measured NRZ eye diagrams at 50, 60, 70, 80 Gbit/s. Limited by the bandwidth of MZM and measurement setup, the eye diagrams of optical receiver are considerably worse with the data rate above 70 Gbit/s. By tuning the EQ of TIA, the response of optical receiver can significantly improve. Figure 9 demonstrates the measured eye diagrams of optical receivers at 70 Gbit/s before and after tuning the EQ.
Fig. 8. Measured NRZ eye diagrams of optical receiver at (a) 50 Gbit/s, (b) 60 Gbit/s, (c) 70 Gbit/s, (d) 80 Gbit/s.
Fig. 9. Measured NRZ eye diagrams of optical receiver at 70 Gbit/s (a)before tuning the EQ (b) after tuning the EQ.
The transmission BER is calculated by off-line digital signal processing (DSP). PRBS with length of 215 is generated and loaded into the AWG. In Tx side, pre-emphasize is applied to compensate the transmission loss of RF cables and frequency response of optical modulator. The received signal is digitalized by oscilloscope with 256 GS/s sampling rate and re-sampled to one sample per symbol in offline DSP. Adaptive least-mean-square (LMS) algorithm filter with 51-tap and adaptive maximum likelihood sequence estimation (MLSE) are used to eliminate inter-symbol interference (ISI) generated in transmission. BER is finally calculated bit-by-bit.
The optical input power of PD which is tuned through VOA, can be concluded using the measured average photocurrent and the responsivity of PD. The BER result with different bit rate at an input power of −8 dBm are given in Fig. 10(a). 100 Gbit/s NRZ operation with BER below the 20% FEC code is achieved. The BERs vs. different input optical power at 85 Gbit/s and 95 Gbit/s are plotted in Fig. 10(b). Considering BER below the 20% FEC code, the lowest input power of PD is −13 dBm and −10 dBm at 85 Gbit/s and 95 Gbit/s, respectively.
Fig. 10. Measured results of (a) BER with different bit rate at the input power of −8 dBm (b) BERs vs. the input optical power of PD at 85 Gbit/s and 95 Gbit/s.
Table 1 summarizes the measurements and compares to state-of-the-art high speed optical receivers. Based on the 180 nm BiCMOS technology, we successfully realize co-design of high-speed optical receiver. The optical receiver which adopts the S2D topology, can operate up to 100 Gbit/s with soft-decision forward error correction (SD-FEC) threshold. To the best of our knowledge, it is the first reported NRZ optical receiver up to 100 Gbit/s.
Table 1. Comparison with state-of-the-art high speed optical receivers
5. Conclusions
A hybrid integration optical receiver is proposed and demonstrated with COB assembly. An equivalent circuit model of silicon photonic PD is built to characterize the property of PD. Co-design of PD, TIA and parasitic in assembly is considered to optimize the performance of optical receiver. Small signal electrical performances of TIA, as well as small signal O-E performances of PD and optical receiver are evaluated. The electrical 3-dB bandwidth of TIA and O-E 3-dB bandwidth of optical receiver are above 36.8 GHz and 36 GHz, respectively. At data rate of 50, 60, 70, 80 Gbit/s, clear open eye diagrams are demonstrated for the TIA and the optical receiver. Up to 100 Gbit/s NRZ signal detection is achieved with BER below the 20% FEC threshold.
Funding
National Key Research and Development Program of China (2019YFB1803602); Beijing Science and Technology Planning Project (Z191100004819006); Hubei Technological Innovation Special Fund (2019AAA054).
Disclosures
The authors declare no conflicts of interest.
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