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Integrating GeSn photodiode on a 200 mm Ge-on-insulator photonics platform with Ge CMOS devices for advanced OEIC operating at 2 μm band

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Abstract

High-performance GeSn multiple-quantum-well (MQW) photodiode is demonstrated on a 200 mm Ge-on-insulator (GeOI) photonics platform for the first time. Both GeSn MQW active layer stack and Ge layer (top Ge layer of GeOI after bonding) were grown using a single epitaxy step on a standard (001)-oriented Si substrate (donor wafer) using a reduced pressure chemical vapor deposition (RPCVD). Direct wafer bonding and layer transfer technique were then employed to transfer the GeSn MQW device layers and Ge layer to a 200 mm SiO2-terminated Si handle substrate. The surface illuminated GeSn MQW photodiode realized on this platform exhibits an ultra-low leakage current density of 25 mA/cm2 at room temperature and an enhanced photo sensitivity at 2 μm of 30 mA/W as compared to a GeSn MQW photodiode on Si at 2 μm. The underlying GeOI platform enables monolithic integration of a complete suite of photonics devices operating at 2 μm band, including GeOI strip waveguides, grating couplers, micro-ring modulators, Mach–Zehnder interferometer modulators, etc. In addition, Ge CMOS circuits can also be realized on this common platform using a “photonic-first and electronic-last” processing approach. In this work, as prototype demonstration, both Ge p- and n-channel fin field-effect transistors (FinFETs) were realized on GeOI simultaneously with decent static electrical characteristics. Subthreshold swings of 150 and 99 mV/decade at |VD| = 0.1 V and drive currents of 91 and 10.3 μA/μm at |VG-VTH| = 1 V and |VD| = 0.75 V were achieved for p- and n-FinFETs, respectively. This works illustrates the potential of integrating GeSn (as photo detection material) on GeOI platform for Ge-based optoelectronics integrated circuits (OEICs) targeting communication applications at 2 μm band.

© 2019 Optical Society of America under the terms of the OSA Open Access Publishing Agreement

1. Introduction

2 μm wavelength band has emerged as a promising candidate for the next communication window [1]. Recent advancement in low-loss hollow-core photonic bandgap fibers (HC-PBGFs) and thulium doped fiber amplifiers (TDFAs) paves way for 2 μm window from proposal toward applications [2–4]. To enable 2 μm communications, Si photonics based integrated circuits are strongly desired.

Current mainstream Si photonics is built on silicon-on-insulator (SOI) substrates. Photonics components, including low-loss waveguides, (de)multiplexer, Mach-Zehnder interferometer (MZI) modulator, and micro-ring modulator, have been realized on SOI with excellent performance at wavelengths around 1.31 and 1.55 μm [5]. Ge photo detectors for light detection are usually integrated on SOI waveguides with the use of selectively epitaxy. With slight tensile strain resulting from the difference in thermal expansion coefficients between Si and Ge, such Ge photo detectors offer good coverage to C-band applications. Hybrid III-V lasers are utilized as the on-chip laser source through bonding approach [6,7]. Recent demonstration of direct growth of III-V lasers on Si substrate could further reduce the manufacturing cost [8–11].

To develop 2 μm integrated Si photonics, SOI is an appropriate and convenient starting substrate. SOI-based (MZI and micro-ring) modulator and defects-mediated Si photo detectors have been realized on SOI platform to operate at 2 μm band. However, the weak interaction between the photons with energy below bandgap of Si and implant-induced defects requires Si-based photo detectors to have large footprint and to operate at large reverse bias [12,13].

Ge-on-insulator (GeOI) has attracted increasing attention for applications at 2 μm and beyond [14,15]. Ge has higher refractive index than Si, enabling even more compact waveguide-based photonic devices [16]. In addition, Ge was reported to have larger thermal-optic effect and stronger plasma dispersion effect, which can be utilized to realize highly efficient and compact Ge based modulators [17–19]. Larger electron-related third-order χ(3) nonlinearity of Ge could also be exploited for optical parametric amplifiers and oscillators at mid-infrared (MIR) range [20,21]. In addition to these superior optical properties, introducing tensile strain into Ge or incorporating Sn into Ge could realize light emission and detection functionalities at 2 μm [22–28]. This makes possible the monolithic integration of all active and passive photonic components on the GeOI platform. Moreover, Ge is considered as a promising channel material candidate to replace Si for advanced transistors due to its higher carrier mobilities. Ge planar field-effect transistor (FET), three-dimensional (3D) fin FET (FinFET), and nanowire FET (NWFET) complementary metal-oxide-semiconductor (CMOS) devices and circuits have been demonstrated on GeOI substrate with excellent electrical characteristics [29–31]. Therefore, GeOI could be a better starting platform than SOI to monolithically integrate all Ge based photonics devices with advanced Ge CMOS for advanced optoelectronic integrated circuits (OEICs) at 2 μm band.

Figure 1(a) shows a simplified cross-sectional schematic of the Ge CMOS photonics platform, comprising GeOI strip waveguides, GeOI grating couplers, GeOI modulator using pn junction, GeSn photo detector, and Ge CMOS. Basic components such as strip waveguides and grating couplers were realized in this work. Figure 1(b) shows the tilted-view scanning electron microscopy (SEM) image of the GeOI strip waveguide with waveguide width of 800 nm and height of 260 nm. Inset in Fig. 1(b) shows the simulated fundamental transverse electric (TE) mode profile of the Ge strip waveguide at 2 μm. Figure 1(c) shows the top-view microscopy image of the GeOI grating couplers with linear adiabatic tapers.

 figure: Fig. 1

Fig. 1 (a) A simplified cross-sectional schematic of proposed integrated GeOI photonics platform that exploits the advantage of Ge CMOS with Ge strip waveguide (WG), grating coupler, modulator, and GeSn photo detectors on a common GeOI substrate. (b) Tilted-view SEM image of GeOI strip WG with WG width of 800 nm and height of 260 nm. Inset: Simulated fundamental TE mode profile. (c) Top-view microscopy image of fabricated GeOI grating couplers with linear adiabatic taper. (d) Top-view SEM image of one GeSn photo detector achieved in this work with standard GSG electrode configuration.

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In this paper, we presented the first GeSn multiple-quantum-well (MQW) p-i-n photodiode on an advanced GeOI photonics platform. High speed photo detection at 2 μm has been demonstrated by using GeSn MQW photodiode on Si in our previous work [28]. The significance of this work is the adoption of a GeOI platform for 2 μm optoelectronic integration using GeSn as photo detection material and demonstration of the feasibility by realizing GeSn photodetectors and Ge transistors using same platform. This monolithically integrated GeSn photo detector fills the missing photo detection part of Ge-based OEICs operating at 2 μm. Figure 1(d) shows the top-view SEM image of one completed GeSn photo detector with standard ground-signal-ground (GSG) electrode. The entire device layer stack was grown in a single epitaxy step followed by direct wafer bonding and layer transfer at 200 mm scale. Using the GeSn-MQW-on-GeOI wafer, surface illuminated GeSn MQW p-i-n photodiodes were demonstrated showing excellent DC performance with high on/off ratio (at ± 1 V) of around five orders of magnitude and ultra-low leakage current density of 25 mA/cm2 at a reverse bias of 1 V. To the best of our knowledge, this is the lowest value achieved for all reported GeSn photodiodes that could cover 2 μm band and is comparable to state-of-the-art Ge photodiodes. Enhanced photo responsivity of ~30 mA/W at 2 μm is achieved due to the bottom reflector (buried oxide) and could be significantly improved with future realization of GeOI waveguide integrated GeSn photo detectors. In addition, both p- and n-channel Ge FinFETs were fabricated on the GeOI platform with decent electrical characteristics, e.g. subthreshold swings of 150 and 99 mV/decade and drive currents of 91 and 10.3 μA/μm for p- and n-channel FinFETs, respectively. This work illustrates the feasibility of using GeSn as a photo detection material for Ge-based OEICs on GeOI platform functioning at 2 μm band.

2. Material growth and formation of GeSn-MQW-on-GeOI platform

The GeSn MQW active layer and a top Ge layer (which would become the Ge layer of GeOI) were first grown on a 300 mm (001)-oriented Ge-buffered Si substrate. Cyclic thermal anneal was performed after the Ge buffer growth to reduce the threading dislocation density (TDD) to a level of 107 cm−2 as measured from plane-view transmission electron microscopy (TEM). After that, GeSn/Ge MQW p-i-n structure was grown with digermane (Ge2H6) and tin tetrachloride (SnCl4) as reactive gas precursors. The entire material growth was performed using reduced pressure chemical vapor deposition (RPCVD) with in-situ doped p+- and n+-contact layers. A thicker GeSn film would be beneficial for achieving a higher responsivity, however, it would also raise the defect density and leakage current density when the thickness is above the critical thickness. The GeSn/Ge MQW was intentionally designed within critical thickness to ensure that it is fully compressively strained to the Ge buffer. The reasons for choosing GeSn MQW, instead of bulk GeSn, are that (1) MQW structure increases the thickness of pseudomorphic GeSn film that could be grown on the Ge virtual substrate, which is beneficial for light detection and for enabling low leakage at the same time by avoiding strain relaxation [28]; (2) MQW structure is promising for light emission due to spatially localized carriers and reduced density of states [26] and for modulation through quantum confined Stark effect (QCSE). Integrated optical interconnects have been demonstrated by using Ge MQW on a SiGe waveguide platform [32]. Therefore, it is worthwhile to investigate the GeSn MQW for its potential to integrate light source, modulators, and photo detector on a common GeOI photonic platform with a single epitaxial growth step. An unintentionally doped Ge layer was finally grown on top, which later (after bonding) would function as the waveguide layer for GeOI based photonics components and transistor layer for Ge CMOS. The 300 mm donor wafer was reduced to 200 mm scale for the subsequent wafer bonding process.

Figure 2 depicts the process flow for realizing the GeSn MQW on GeOI platform. A SiO2 layer and a SiN layer were first deposited on the surface of Ge by plasma enhanced CVD (PECVD). The inserted SiN film suppresses interfacial void formation during bonding [33]. Densification was then carried out by thermal annealing in N2 ambient. Both donor and handle (200 mm Si wafer terminated with PECVD SiO2) wafers were exposed to O2 plasma treatment before being brought into contact at room temperature. Post-bonding annealing in N2 ambient at 300 °C for 4 hours was used to enhance the bonding strength. The Si donor substrate and Ge buffer were then removed using a combination of tetramethylammonium hydroxide (TMAH) wet etch and chemical mechanical polishing (CMP). Etching of the remaining Ge buffer to reach the MQW photo detector layer was realized using fluorine-based (F-based) reactive ion etching (RIE) which was calibrated using ellipsometry. Our CMP capability is limited by a 200 mm tool, and thus wafer bonding could only be performed for wafer diameters up to 200 mm. However, the technique demonstrated here is scalable to larger wafer sizes. The resulting wafer enables a “photonic-first and electronic-last” integration approach. GeSn photo detector could be first realized, followed by GeOI waveguide-based photonic devices. Ge CMOS would be finally realized as advanced transistors usually need a thinner Ge film as compared to waveguide based photonic devices.

 figure: Fig. 2

Fig. 2 Process flow for realizing GeSn MQW photodiode active device layer stack on Ge-on-insulator platform through a low temperature wafer bonding and layer transfer technique with 200 mm wafer scale.

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Figure 3(a) shows a cross-sectional TEM image of the bonded GeSn MQW on GeOI wafer. A seamless bonding interface is achieved. The GeSn/Ge MQW absorption layer consists of six periods of 25 nm GeSn wells sandwiched between 35 nm Ge barriers, as illustrated in Fig. 3(b). The Sn concentration in the GeSn wells is 8%, which could cover 2 μm band considering both quantum confinement effect and compressive strain. This can be extended to longer wavelengths by introducing higher Sn concentrations [28,34–36]. Figure 3(c) shows a photograph of the bonded 200 mm wafer. High quality film with mirror-like surface was achieved across the entire wafer. From the photograph image of Fig. 13(c), only three defects or voids (two with diameter of ~6 mm and one with diameter of ~3 mm) were observed. We also examined other areas after dicing the wafer into small pieces with a dimension of 1 × 1 cm2. No obvious defects were observed under microscope inspection for more than 10 pieces taken from different positions of the wafer. The yield or transfer ratio (defined by the ratio of successfully transferred area to the total wafer area) is estimated to be close to 100%.

 figure: Fig. 3

Fig. 3 (a) Cross-sectional TEM image of the bonded GeSn/Ge MQW on GeOI wafer after removal of Si donor substrate and Ge buffer. (b) Cross-sectional schematic of the GeSn/Ge MQW with six periods of GeSn wells sandwiched between Ge barriers and vertical p-i-n structure. (c) Photograph image of the resulting 200 mm as-bonded wafer.

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More material characterizations were conducted to investigate the properties of the bonded wafer. Figure 4(a) shows the secondary ion mass spectrometry (SIMS) depth profile of Si, Ge, and Sn elements from the surface to the buried oxide (BOX) layer of the bonded GeSn MQW on GeOI wafer. Sharp transitions between GeSn wells and Ge barriers can be clearly observed. Asymmetric (224) X-ray diffraction (XRD) reciprocal space mapping (RSM) of the bonded sample is shown in Fig. 4(b). The diffraction peak positions are located at the same in-plane reciprocal lattice vector Qx, which indicates that the GeSn MQW is fully compressively strained to the Ge buffer and no strain relaxation occurs during the bonding process.

 figure: Fig. 4

Fig. 4 (a) SIMS depth profile of Si, Ge, and Sn from surface to buried oxide of the bonded GeSn/Ge MQW on GeOI wafer after Si donor substrate and Ge buffer removal. (b) (224) reciprocal space mapping of the bonded GeSn/Ge MQW on GeOI wafer. The GeSn/Ge MQW is fully compressively strained to the Ge buffer after bonding.

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Figure 5 shows the high resolution XRD rocking curves at (004) orientation for five different points from the center to the edge of the 200 mm wafer along <110> direction. A series of satellite peaks from the periodic GeSn/Ge MQW can be clearly identified from the curves at lower two theta angles with reference to the Ge peak. The well-defined satellite peaks indicate the high crystalline quality of the GeSn/Ge MQW stack with good uniformity in epilayer thickness. No obvious difference for the peak intensity, peak positions, and full-width-half-maximum (FWHM) was observed for all five curves, revealing the excellent uniformity of the GeSn MQW film on the GeOI platform across the entire 200 mm wafer.

 figure: Fig. 5

Fig. 5 High resolution XRD rocking curves of the 200 mm GeSn MQW on GeOI wafer at (004) orientation, taken at five different points from the center to the edge along the <110> direction on the wafer. No quantitative difference for the peak intensity and peak position was observed, indicating excellent uniformity of GeSn/Ge MQW film across the entire 200 mm bonded wafer.

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3. GeSn MQW photodiode fabrication and characterization

At the operating wavelengths of GeOI-based OEICs, materials with narrower bandgaps than Ge need be employed as the detection medium. GeSn photo detector is demonstrated here for GeOI-based OEICs targeting 2 μm applications. The 2 μm functionality from the demonstrated surface illuminated GeSn MQW photo detectors presents a major step towards future GeOI waveguide integrated GeSn photo detectors.

Figure 6(a) shows the three-dimensional (3D) schematic of the GeSn/Ge MQW photodiode on GeOI platform. The key process steps for fabricating the GeSn/Ge MQW photodiode are listed in Fig. 6(b). After forming GeSn MQW active layer stack on GeOI platform through bonding, circular photo detector mesas were first patterned and formed by chlorine-based (Cl-based) inductive coupled plasma (ICP) etching. Mixed etching gases of Cl2, SiCl4, and Ar were employed and optimized to achieve a smooth mesa sidewall. After treatment in hydrogen chloride (HCl) solution, a ~350 nm thick SiO2 was then deposited as a passivation and isolation layer using PECVD at a temperature T of 250 °C. The contact region was then patterned and opened by F-based dry etching followed by wet etching using dilute hydrogen fluoride (DHF) solution. Finally, aluminum (Al) electrodes were formed by sputtering and Cl-based ICP etch. The electrodes were designed in standard ground-signal-ground (GSG) configuration with a pitch of 150 µm.

 figure: Fig. 6

Fig. 6 (a) 3D schematic of the surface illuminated GeSn/Ge MQW photodiode on GeOI platform (not to scale). (b) Key process steps for fabricating the GeSn/Ge MQW on GeOI vertical p-i-n photodiode.

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TEM analysis was performed to check the material quality and etched sidewall morphology after device fabrication. Figure 7(a) shows the cross-sectional scanning TEM (STEM) image of a GeSn/Ge MQW photodiode on GeOI platform showing the mesa sidewall region. A smooth mesa sidewall was formed. No obvious threading dislocations were observed. The energy-dispersive X-ray spectroscopy (EDX) elemental mapping of Ge and Sn at the MQW region are shown in Fig. 7(b). GeSn wells and Ge barriers are regularly spaced. Figure 7(c) shows the high resolution TEM (HRTEM) image at the Ge/BOX interface. The crystalline lattice fringes of the Ge film can be clearly observed after device fabrication. This is the premise for future integration of GeOI waveguide based photonic devices and advanced Ge channel CMOS.

 figure: Fig. 7

Fig. 7 (a) Cross-sectional STEM image of a fabricated photodiode showing the mesa sidewall region. The irregular vertical bars are created during focus ion beam processing during TEM sample preparation. (b) Energy-dispersive X-ray spectroscopy mapping at the MQW region for Ge and Sn. (c) High resolution TEM at Ge/BOX interface showing the clear lattice fringes of Ge.

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Dark current and photo responsivity are two main performance metrics of photo detectors. Figure 8 shows the room temperature dark current-bias voltage (Idark-Vbias) characteristics of the GeSn/Ge MQW p-i-n photodiode fabricated on the GeOI platform with circular mesa diameter (D) of 20, 30, and 40 μm. Excellent rectifying behaviors with high on-state current to off-state current ratio (measured at Vbias of + 1 V and −1 V, respectively) of ~five orders of magnitude are achieved for all photodiodes. The dark current density of the GeSn MQW photodiodes is compared with other reported GeSn photodiodes on Si substrate as shown in Fig. 9 [28,35,37–51]. The dark current density was normalized to the junction area [π(D/4)2] and taken at reverse bias of 1 V for fair comparison. Our photodiode achieved a lowest dark current density of 25 mA/cm2 among all the reported results. This indicates the high quality of the pseudomorphic GeSn/Ge MQW layer stack even after the bonding process.

 figure: Fig. 8

Fig. 8 Dark current-bias voltage (Idark-Vbias) curves for the fabricated photodiodes with various mesa diameters (D). High on-state current to off-state current ratio (measured at Vbias of + 1 V and −1 V, respectively) of ~5 orders of magnitude was achieved.

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 figure: Fig. 9

Fig. 9 Benchmarking of dark current density Jdark at bias voltage Vbias = −1 V for all GeSn p-i-n photodiodes. Our GeSn photodiode on GeOI substrate shows the lowest leakage current density as compared to all other Si-based GeSn photo detectors.

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To gain insight into the leakage mechanism, a temperature (T) dependent activation energy (Ea) study was performed. Figure 10(a) shows the current-bias voltage (I-Vbias) curves of a GeSn MQW photodiode with mesa diameter of 30 μm at various temperatures ranging from 220 to 360 K with a step of 10 K. Figure 10(b) shows the Arrhenius-type plot of ln(Idark/T3/2) against 1/kT for the photodiode at different bias voltage from −0.2 to −1 V. The analysis differentiates two different slopes in two different temperature regimes as indicated in Fig. 10(b), i.e. high temperature regime from 310 to 360 K and low temperature regime from 220 to 270 K. The slopes are linearly fitted to yield the gradients, which are the thermal activation energy of the dark current as formulated by Idark = BT3/2e-Ea/kT(eqVbias/2kT-1). B is a constant and k is the Boltzmann constant. Figure 10(c) shows extracted activation energy as a function of reverse bias at two temperature regimes. High temperature regime exhibits larger activation energies for certain bias voltage. Slight decrease of activation energies from 0.298 to 0.250 eV is observed for high temperature regime. The compressive strained Ge0.92Sn0.08 has a direct bandgap of 0.593 eV and an indirect bandgap of 0.521 eV [28]. This indicates that the leakage is dominated by the mid-gap Shockley-Read-Hall (SRH) generation mechanism. For low temperature regime, faster decrease of activation energies from 0.226 to 0.099 eV can be clearly seen. It reveals that the trap-assisted tunneling (TAT) contributes significantly to the leakage and with the presence of higher electric fields, band-to-band tunneling (BTBT) contribution is enhanced [52].

 figure: Fig. 10

Fig. 10 (a) Temperature dependent current-bias voltage (I-Vbias) curves of one fabricated GeSn MQW photodiode with mesa diameter of 30 μm. The characterized temperature range is from 220 to 360 K with a step of 10 K. (b) Plot of ln(Idark/T3/2) vs. 1/kT for the photodiode at various bias voltage from −0.2 to −1 V. Linear fitting was employed for extracting activation energy Ea. The linear fitting was performed at two separate temperature regions, i.e. high temperature ranges from 310 to 360 K and low temperature ranges from 220 to 270 K. (c) Extracted Ea as a function of reverse bias voltage for two temperature regions.

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The steady-state photo responsivity characteristics of the GeSn/Ge MQW photodiode on GeOI platform was measured at wavelengths of 1550 and 2000 nm. Single mode fiber (SMF) was utilized for guiding the light from laser sources to the surface window of the photodiode with a mesa diameter of 40 µm for easy fiber alignment. Figure 11(a) presents the dark and illuminated I-Vbias characteristics of the photodiode device under test (DUT) at a wavelength of 1550 nm. The arrow indicates the direction of increasing incident light power Pin. The photocurrent measured at zero bias increases linearly with Pin and no current saturation is observed as the photo current reaches beyond 1 mA as shown in Fig. 11(b). Flat photo responsivity is also achieved even at zero bias, indicating good collection efficiency of the photo-generated carriers.

 figure: Fig. 11

Fig. 11 (a) Current-bias voltage (I-Vbias) characteristics of the GeSn MQW photodiode on GeOI platform at illumination wavelength of 1550 nm with incident power (Pin) of −3, 0, 3, and 6 decibel milliwatts or dBm, respectively. Dark I-Vbias is also plotted as reference. (b) Photo current at zero bias of the GeSn MQW photodiode as a function of Pin. The photodiode under test has a mesa diameter (D) of 40 µm for facilitating the fiber alignment with the photodiode surface window.

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Photo responsivity at 2 µm was investigated. Figure 12 plots the I-Vbias curve of the photodiode under 6 dBm incident power at 2 µm. The I-Vbias curve for illumination at 1.55 µm with the same Pin is also shown for reference. It should be noted that, for the surface illuminated photodiode, enhanced photo responsivities were achieved for both characterized wavelengths as compared to our previous GeSn MQW photodiode on Si counterparts [28], as illustrated in Fig. 13. 65% and 98% improvements were obtained for 1550 nm and 2000 nm, respectively. This could be due to the reflection from the buried oxide layer, which enhances the external quantum efficiency of the GeSn photodiode. Similar observation has been reported in Ref [53,54]. The GeSn MQW photodiode with a mesa diameter of 20 μm has a junction capacitance Cj of ~9 × 10−14 F, as calculated using Cj = ε0A(TGeGe + TGeSnGeSn)−1 [49]. ε0 is the vacuum permittivity, A is the photodiode area, εGe and εGeSn are relative permittivity of Ge and GeSn. εGeSn is estimated from linear interpolation between εGe and εSn (relative permittivity of Sn). TGeSn is the thickness of GeSn, which is 150 nm. TGe is the thickness of Ge, which is ~350 nm including barriers and spacers between heavily-doped contact layers. The intrinsic RC-limited bandwidth fRC is then calculated to be 35 GHz by using fRC = 1/2πRC. R is the load resistance of 50 Ω. The transit-limited bandwidth is given by ftransit = 0.45vsat/T. Assuming the same saturation velocity vsat of 6 × 106 cm/s for Ge and GeSn and a total thickness T of ~500 nm. ftransit is calculated to be 54 GHz. The 3-dB bandwidth f3-dB of the GeSn photodiode could be as high as 29.3 GHz, given by f3-dB = (ftransit−2 + fRC−2)-1/2 if parasitic capacitance is minimized or becomes negligible.

 figure: Fig. 12

Fig. 12 Current-bias voltage (I-Vbias) characteristics of the GeSn MQW photodiode on GeOI platform at illumination wavelength of 1550 nm and 2000 nm with the same incident power Pin of 6 dBm.

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 figure: Fig. 13

Fig. 13 Photo responsivity of GeSn/Ge MQW photodiode on Si substrate and on GeOI substrate at illumination wavelength λ of 1550 and 2000 nm. 65% and 98% improvements in responsivity were achieved for λ of 1550 and 2000 nm, respectively.

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The surface illuminated photodiode here is an initial experimental demonstration of using GeSn as photo detection material for GeOI photonics platform. The responsivity or quantum efficiency at 2 µm is limited by the total absorption film thickness of Ge0.92Sn0.08, which is 150 nm. Further realization of GeOI waveguide integrated photo detector could significantly improve the responsivity.

4. Ge p- and n-channel FinFETs fabrication and characterization

Ge p- and n-channel FinFETs have also been simultaneously realized on the GeOI platform. The GeSn MQW photo detector and Ge FinFETs are not processed in the same flow with co-optimization. This work shows the possible “photonic-first and electronic-last” monolithic integration approach using a top-down process flow.

Figure 14 shows the 3D schematic of a Ge p- and n-channel FinFETs on the GeOI platform. Figure 15 summarizes the key process steps simultaneously for fabricating both Ge p- and n-channel FinFETs on the GeOI substrate. After thinning down and cyclic surface cleaning using diluted DHF and deionized (DI) water, the source/drain regions for p- and n-channel FETs were opened using electron-beam lithography (EBL) with positive photoresist poly(methyl methacrylate) (PMMA) as implant mask in sequence. Boron and phosphorus implants were then performed with a dose of 1 × 1015 cm−2 for boron and 5 × 1014 cm−2 for phosphorus and the same energy of 10 keV. Boron and phosphorus dopant activation was realized at the same time by rapid thermal anneal (RTA) at a temperature of 450 °C for 1 minute. After that, Ge fins were patterned and formed using Cl-based ICP. This was followed by gate stack formation which consists of 4-nm HfO2 deposition using atomic layer deposition (ALD) and molybdenum/tungsten (Mo/W) deposition using magnetron sputtering. After that, gate was defined using EBL and etched with F-based RIE. Finally, nickel (Ni) was lifted-off at the source/drain regions as the contact metal to complete the entire fabrication process.

 figure: Fig. 14

Fig. 14 Three-dimensional schematic of the Ge p- and n-channel FinFETs on GeOI platform. (not to scale).

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 figure: Fig. 15

Fig. 15 Key process steps for fabricating the Ge FinFETs.

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Top-view SEM images of one complete Ge p- and n-channel FinFET are shown in Fig. 16(a). SEM image of the n-FinFET in Fig. 16(b) clearly shows 5 parallel fins. Figures 17(a) and (b) plot drain current versus gate voltage (ID-VG) transfer characteristics of a Ge p- and n-channel FinFET, respectively, with a channel length Lch of 300 nm, a fin width WFIN of 30 nm, and a fin height HFIN of 40 nm. The drain current is normalized to the effective channel width, which is equal to 2 × HFIN + WFIN. Decent electrical characteristics were achieved with on/off ratio of more than three orders of magnitude at VD of ± 0.1 V for both FinFETs. Subthreshold swings of 150 and 99 mV/decade were obtained at VD of ± 0.1 V for p- and n-FinFETs, respectively. Drain current versus drain voltage (ID-VD) output characteristics for the same devices are plotted in Figs. 17(c) and (d), respectively. The gate-over drive |VG-VTH| was varied from 0 to ± 1 V with a step of ± 0.1 V, showing well-behaved saturation and pinch-off characteristics. Drive currents of 91 and 10.3 μA/μm were achieved at |VG-VTH| = 1 V and |VD| = 0.75 V for both FinFETs. In this work, both p- and n-channel FETs share the common gate stack formation process. The unsatisfactory high-k/Ge interface could be a more severe problem for n-FETs. This may account for the low drive current of n-FinFETs. Further optimization of the gate stack is required to improve the n-FinFETs performance.

 figure: Fig. 16

Fig. 16 (a) Top-view scanning electron microscopy (SEM) images of fabricated p- and n-channel FinFETs on the GeOI platform. The top Ge film was thinned down to 40 nm. (b) Zoomed-in SEM view of the n-FinFET with 5 parallel fins.

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 figure: Fig. 17

Fig. 17 Transfer curves of the Ge (a) p-FinFET and (b) n-FinFET with Lch of 300 nm and WFIN of 30 nm at |VD| of 0.1 and 0.5 V. (c-d) Output characteristics of the same devices with |VG-VTH| from 0 to 1 V with step of ± 0.1 V.

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5. Conclusion

For the first time, high performance GeSn MQW photo detector is demonstrated on a 200 mm GeOI photonics platform. The GeSn MQW on GeOI architecture was formed using direct wafer bonding and layer transfer technique, showing potential for future large-scale integration. The surface illuminated photodiodes exhibit ultra-low leakage density of 25 mA/cm2 at bias voltage of −1 V and enhanced responsivity of 0.354 A/W at 1550 nm and 0.03 A/W at 2000 nm wavelength, as compared to GeSn MQW photodiodes on Si substrate. Ge FinFETs have also been realized on the GeOI platform to substantiate the possibility of integrating advanced electronic devices on GeOI photonics platform via a “photonic-first and electronic-last” top-down processing approach. Further efforts could be made on monolithic integration of a complete suite of GeOI based electronics and photonics (including strained Ge or GeSn based lasers, GeOI strip or rib waveguides, electro-optic or thermo-optic modulators, GeSn photo detectors) on this novel platform for Ge-based OEICs operating at 2 μm band.

Funding

Singapore Ministry of Education Tier 2 Fund (MOE2018-T2-1-137); NUS Startup Funding (R-263-000-C58-133); National University of Singapore Trailblazer (R-263-000-B43-733).

Acknowledgements

The authors acknowledge Ms. Xin Guo at Silicon Technologies, Centre of Excellence (Si-COE) in Nanyang Technological University for her assistance with the device characterization and technical discussions.

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Figures (17)

Fig. 1
Fig. 1 (a) A simplified cross-sectional schematic of proposed integrated GeOI photonics platform that exploits the advantage of Ge CMOS with Ge strip waveguide (WG), grating coupler, modulator, and GeSn photo detectors on a common GeOI substrate. (b) Tilted-view SEM image of GeOI strip WG with WG width of 800 nm and height of 260 nm. Inset: Simulated fundamental TE mode profile. (c) Top-view microscopy image of fabricated GeOI grating couplers with linear adiabatic taper. (d) Top-view SEM image of one GeSn photo detector achieved in this work with standard GSG electrode configuration.
Fig. 2
Fig. 2 Process flow for realizing GeSn MQW photodiode active device layer stack on Ge-on-insulator platform through a low temperature wafer bonding and layer transfer technique with 200 mm wafer scale.
Fig. 3
Fig. 3 (a) Cross-sectional TEM image of the bonded GeSn/Ge MQW on GeOI wafer after removal of Si donor substrate and Ge buffer. (b) Cross-sectional schematic of the GeSn/Ge MQW with six periods of GeSn wells sandwiched between Ge barriers and vertical p-i-n structure. (c) Photograph image of the resulting 200 mm as-bonded wafer.
Fig. 4
Fig. 4 (a) SIMS depth profile of Si, Ge, and Sn from surface to buried oxide of the bonded GeSn/Ge MQW on GeOI wafer after Si donor substrate and Ge buffer removal. (b) (224) reciprocal space mapping of the bonded GeSn/Ge MQW on GeOI wafer. The GeSn/Ge MQW is fully compressively strained to the Ge buffer after bonding.
Fig. 5
Fig. 5 High resolution XRD rocking curves of the 200 mm GeSn MQW on GeOI wafer at (004) orientation, taken at five different points from the center to the edge along the <110> direction on the wafer. No quantitative difference for the peak intensity and peak position was observed, indicating excellent uniformity of GeSn/Ge MQW film across the entire 200 mm bonded wafer.
Fig. 6
Fig. 6 (a) 3D schematic of the surface illuminated GeSn/Ge MQW photodiode on GeOI platform (not to scale). (b) Key process steps for fabricating the GeSn/Ge MQW on GeOI vertical p-i-n photodiode.
Fig. 7
Fig. 7 (a) Cross-sectional STEM image of a fabricated photodiode showing the mesa sidewall region. The irregular vertical bars are created during focus ion beam processing during TEM sample preparation. (b) Energy-dispersive X-ray spectroscopy mapping at the MQW region for Ge and Sn. (c) High resolution TEM at Ge/BOX interface showing the clear lattice fringes of Ge.
Fig. 8
Fig. 8 Dark current-bias voltage (Idark-Vbias) curves for the fabricated photodiodes with various mesa diameters (D). High on-state current to off-state current ratio (measured at Vbias of + 1 V and −1 V, respectively) of ~5 orders of magnitude was achieved.
Fig. 9
Fig. 9 Benchmarking of dark current density Jdark at bias voltage Vbias = −1 V for all GeSn p-i-n photodiodes. Our GeSn photodiode on GeOI substrate shows the lowest leakage current density as compared to all other Si-based GeSn photo detectors.
Fig. 10
Fig. 10 (a) Temperature dependent current-bias voltage (I-Vbias) curves of one fabricated GeSn MQW photodiode with mesa diameter of 30 μm. The characterized temperature range is from 220 to 360 K with a step of 10 K. (b) Plot of ln(Idark/T3/2) vs. 1/kT for the photodiode at various bias voltage from −0.2 to −1 V. Linear fitting was employed for extracting activation energy Ea. The linear fitting was performed at two separate temperature regions, i.e. high temperature ranges from 310 to 360 K and low temperature ranges from 220 to 270 K. (c) Extracted Ea as a function of reverse bias voltage for two temperature regions.
Fig. 11
Fig. 11 (a) Current-bias voltage (I-Vbias) characteristics of the GeSn MQW photodiode on GeOI platform at illumination wavelength of 1550 nm with incident power (Pin) of −3, 0, 3, and 6 decibel milliwatts or dBm, respectively. Dark I-Vbias is also plotted as reference. (b) Photo current at zero bias of the GeSn MQW photodiode as a function of Pin. The photodiode under test has a mesa diameter (D) of 40 µm for facilitating the fiber alignment with the photodiode surface window.
Fig. 12
Fig. 12 Current-bias voltage (I-Vbias) characteristics of the GeSn MQW photodiode on GeOI platform at illumination wavelength of 1550 nm and 2000 nm with the same incident power Pin of 6 dBm.
Fig. 13
Fig. 13 Photo responsivity of GeSn/Ge MQW photodiode on Si substrate and on GeOI substrate at illumination wavelength λ of 1550 and 2000 nm. 65% and 98% improvements in responsivity were achieved for λ of 1550 and 2000 nm, respectively.
Fig. 14
Fig. 14 Three-dimensional schematic of the Ge p- and n-channel FinFETs on GeOI platform. (not to scale).
Fig. 15
Fig. 15 Key process steps for fabricating the Ge FinFETs.
Fig. 16
Fig. 16 (a) Top-view scanning electron microscopy (SEM) images of fabricated p- and n-channel FinFETs on the GeOI platform. The top Ge film was thinned down to 40 nm. (b) Zoomed-in SEM view of the n-FinFET with 5 parallel fins.
Fig. 17
Fig. 17 Transfer curves of the Ge (a) p-FinFET and (b) n-FinFET with Lch of 300 nm and WFIN of 30 nm at |VD| of 0.1 and 0.5 V. (c-d) Output characteristics of the same devices with |VG-VTH| from 0 to 1 V with step of ± 0.1 V.
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