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We present a silicon electro-optic transmitter consisting of a 28nm ultra-thin body and buried oxide fully depleted silicon-on-insulator (UTBB FD-SOI) CMOS driver flip-chip integrated onto a Mach-Zehnder modulator. The Mach-Zehnder silicon optical modulator was optimized to have a 3dB bandwidth of around 25 GHz at −1V bias and a 50 Ω impedance. The UTBB FD-SOI CMOS driver provided a large output voltage swing around 5 Vpp to enable a high dynamic extinction ratio and a low device insertion loss. At 44 Gbps, the transmitter achieved a high extinction ratio of 6.4 dB at the modulator quadrature operation point. This result shows open eye diagrams at the highest bit rates and with the largest extinction ratios for silicon electro-optic transmitter using a CMOS driver.
© 2017 Optical Society of America
1. Introduction
High bandwidth, low loss, high extinction ratio (ER), and small footprint silicon (Si) Mach-Zehnder modulators (MZMs) are desirable for metro-area and long distance optical communication links [1,2]. Carrier depletion MZMs with travelling-wave electrode design can support high-speed operation in the O and SCL bands at bit rates near 50 Gb/s and bandwidths of 30 GHz [3–11]. In typical Si MZMs, the drive signal voltage swings need to exceed several volts due to the limited electro-optic (EO) modulation efficiency of Si [1]. Such high voltage swings are difficult to achieve using complementary metal oxide semiconductor (CMOS) drivers. Segmented MZMs can operate at high speeds with the low driving signals from standard CMOS drivers [12], but they require multichannel drivers that should have precise timing correction for each segment, making them more difficult to implement at high symbol rates exceeding around 30-40 Gbaud (e.g., see [13,14] for BiCMOS multichannel drivers for segmented indium phosphide modulators). EO transmitters operating beyond 40 Gbps often use BiCMOS instead, but even with voltage swings near 2 Vpp, integrated transmitters exhibit low ER of only 2 to 3 dB [13–17]. A higher ER improves the link power penalty and is especially needed for multi-level modulation formats, such as pulse-amplitude modulation [18].
In this work, we present a three-dimensional (3D) assembled Si photonic EO transmitter consisting of a CMOS driver chip flip-chip bonded onto a Si MZM. The electronic integrated circuit (EIC) was fabricated in the STMicroelectronics 28nm ultra-thin body and buried oxide (UTBB) fully depleted silicon-on-insulator (FD-SOI) CMOS technology [19], and the photonic integrated circuit (PIC) was fabricated in a multi-project wafer shuttle at A*STAR IME coordinated by CMC Microsystems [20]. 3D integration using the flip-chip integration is useful for increasing the integration density and reducing parasitic capacitances in interfacing photonic devices with electronics. In Si photonics, it has been previously demonstrated for electroabsorption modulators (EAMs) [21], semiconductor-insulator-semiconductor capacitor (SISCAP) modulators [22], and carrier depletion MZMs [15–17]. A Si photonic EO transmitter including multi-wavelength channels, EAMs, and hybrid lasers has also been demonstrated [23]. Our flip-chip integrated transmitter achieved a high dynamic ER of 6.4 dB and a low device insertion loss (IL) (i.e., the device loss at the ‘1’ level) of 7.8 dB at 44 Gbps operating at the modulator quadrature point in the C-band. It needed only one signal channel to drive the MZM. To our knowledge, this is the highest ER demonstrated for a flip-chip integrated Si photonic EO transmitter at > 40 Gbps and is the first EO transmitter to use a CMOS EIC to operate beyond 32 Gb/s. In the sections below, we will first describe the MZM design and then the integrated assembly.
2. Si MZM design and characterization
2.1 Travelling-wave electrode design
The Si MZM was designed to be in the single-drive push-pull configuration described in [10,11]. This design requires only one RF signal to drive the MZM, so the measurement of transmitter can be simplified. In addition, this configuration enables easier matching of the modulator characteristic impedance to a 50 Ω termination resistance when the PN junction resistance and capacitance were included.
Similar to [6–8], the design of travelling-wave electrodes should simultaneously consider the velocity match between the RF and optical signal, the match between the characteristic transmission line and the termination impedances, and RF loss. When the velocities and impedances are perfectly matched, the RF attenuation, α (dB/mm), at the EO 3dB bandwidth, f3dB, is α(f3dB)·L = 6.4 dB, where L is the electrode length. The MZM travelling-wave electrodes were designed using ANSYS HFSS, which computed the S parameters of the electrodes. The capacitances and resistances of the lateral depletion PN modulation junction have been previously reported to be 250 fF/mm and 7 Ω·mm, respectively [6]. By loading these parameters to the electrode simulation results, we calculated the propagation constant and characteristic impedance [8]. Because we load two lateral diodes to the travelling-wave electrodes, the diode resistance is doubled and capacitance halved in the model [10,11].
Figure 1(a) shows the cross-section of the designed MZM phase-shifter region, the dimensions of waveguide, doping region and electrodes are included in the figure. The NPN doping configuration reduced the series resistance because the N + + contact resistance was smaller than that in the P + + region. The leftmost and rightmost pads were respectively connected to the Signal and Ground of the EIC output. The DC bias of the phase-shifters was set by the pad in the center. The DC signal was isolated from the RF signal using a series on-chip resistance of 100 kΩ (implemented in the doped Si) and an inductor (6 mm long and 2 µm wide Al in the M1 layer) [10]. The electrodes were terminated on-chip using the highly N doped Si region designed to have an impedance of 50 Ω. Figure 1(b) shows the simulated RF refractive index, and the value over 30 GHz is close to the optical mode group index of 3.8. Figure 1(c) shows the characteristic impedance, which is matched to 50 Ω around 30 GHz. Figure 1(d) shows the RF loss, which is 6.4 dB near 30 GHz for a device length of 4 mm. The simulated electrical S21 −6dB bandwidth shows that the electrode design should support MZM operation up to 26 GHz.
Fig. 1 (a) Cross-section schematic of the phase-shifter in the MZM. The dimensions are indicated. Simulated (b) RF effective refractive index, (c) characteristic impedance, and (d) RF loss.
2.2 Si MZM measurements
Figure 2 shows the fabricated MZM. The Si photonic integrated circuit (PIC) contained the MZM as well the pads and wiring for the EIC. Red dashed line outlines the region for flip-chip bonding (to be described in Section 3). The DC bias pad, thermal tuner pad and input/output optical waveguide are indicated by the red arrows. The MZI used two 3dB multimode interference (MMI) couplers, and each arm of the MZM contained a 4mm long phase-shifter and a 500µm long doped Si resistor. However, only the resistor in one arm was electrically connected for thermal tuning, while the other was included to balance the loss. The pads for the Si resistor are adjacent to the modulator DC pad. One arm was 100 µm longer to use the wavelength to adjust the optical bias point of the modulator. The free spectral range (FSR) was measured to be 5.82 nm around a wavelength of 1550 nm. The MZM was edge-coupled to lensed optical fibers.
First, we describe the DC characteristics of the MZM. Figure 3(a) shows the transmission spectrum of the Si MZM bottom arm at different reverse bias voltages. The spectrum was measured by grounding the modulator DC pad and top arm electrode and applying positive voltages to the bottom arm electrode. From the spectrum we calculated the phase shift and VπL. A similar measurement was performed for the top arm. Figure 3(b) shows the phase shift as a function of the applied reverse bias for both arms of the MZM. The DC VπL was extracted to be 2.7 V·cm and 2.3 V·cm for the top and bottom arms, respectively. The difference is likely due to fabrication variation. The measured propagation loss through the MZM was 7.1 dB. These values are consistent with the lateral diode Si modulator results in [2].
Fig. 3 (a) The Si MZM transmission at different reverse bias voltages applied to the bottom arm. (b) Extracted phase shift of top and bottom arm.
Next, we characterized the RF properties of the MZM. S parameter measurements of the MZM were performed with a vector analyzer (Agilent N5227A) and a 50GHz photodetector (Finisar XPDV2320R). The RF cables and RF probe were de-embedded (using the Agilent N4694-60001 E-Cal kit and GGB CS-8 substrate with SOLT calibration). The input wavelength was 1554 nm, set to the −3dB transmission (i.e., quadrature) point of the MZM. The output RF power of the VNA was 0 dBm. Figures 4(a) and 4(b) show the measured electrical S11 and EO S21 parameters of the MZM at several bias voltages. The electrical S11 shows the RF reflection was < −10 dB at up to 20 GHz, indicating good matching between the characteristic impedance of the MZM and the termination impedance. The EO S21 shows the 3dB bandwidth extended from 19 GHz at 0 V bias to > 25.5 GHz at −1 V bias and beyond, in excellent agreement with the expected EO bandwidth from the results of Figs. 1(b)-1(d). Slight discrepancies may come from the differences in the values of the PN junction resistance and capacitance between the device and those used in the design. The bandwidth remained roughly constant at bias voltages less than −1V because the lateral PN junction capacitance remained roughly constant.
Fig. 4 The (a) S11 and (b) EO S21 parameters of the Si MZM. The output RF signal power of the VNA was 0 dBm.
3. CMOS driver and flip-chip bonding
The EIC containing the driver was flip-chip bonded onto the Si photonic die containing the MZM. The design and performance of the EIC have been previously reported in [19], and Fig. 5(a) shows the optical micrograph of the EIC. Briefly, the EIC was designed in the STMicroelectronics 28nm UTBB FD-SOI technology. The chip contained a three-lane transmitter/repeater array, which output a large swing in the range of 5.2 to 4.3 Vpp between 40 and 60 Gbps to a 50 Ω load. It has two sets of bias pads for 6V and 1V supplies [19]. The amplification and signal integrity of the EIC are controlled by the DC biases to the chip.
Fig. 5 Optical micrographs of (a) EIC, (b) EIC with solder bumps, (c) bond region after flip-chip bonding, and (d) 3D EO-transmitter assembly.
The EIC was flip-chip bonded onto the Si PIC using a die-to-die process with SnPb (63/37%) solder bumps that had nominal diameters of 50 μm. The arrow in Fig. 5(a) shows the flip direction of EIC onto the Si photonic die. Figure 5(b) shows the solder bumps on the EIC. Although the EIC contained 3 lanes, we only used the center amplifier lane to drive the MZM. Figures 5(c) and 5(d) show the bond region after flip-chip bonding. The electronic die was about 1 mm x 1 mm in area, while the Si photonic die was 3.2 mm x 16 mm. One Si photonic die contained 4 MZM structures.
4. Integrated assembly characterization
The integrated assembly was measured by electrical probing and with active alignment of the input/output lensed optical fibers to the PIC. A small amplitude (≤ 1 Vpp) RF input was applied to the corresponding pads on the PIC, and the large signal output was fed to the MZM. The assembly was characterized on a temperature controlled chip-holder held at 24°C, since the thermal expansion due to heat generated by the EIC would misalign the fiber-to-chip coupling without any temperature control. The thermally tunable phase-shifter of the MZM was not used in the experiment, and the device operation point was set by the laser wavelength.
Although the EIC was designed for a 50Ω load and the modulator impedance was close to 50 Ω, the resistance, capacitance and inductance of the solder bump and resistance of the contacts would increase the load impedance for the EIC. Therefore, signal voltage swing from EIC would have been lower than that reported in [19] for the same bias conditions. The exact output swing delivered to the MZM could not be measured in the integrated assembly.
4.1 S parameter measurements
Figures 6(a) and 6(b) show the measured S11 and EO S21 parameters, respectively, of the integrated assembly for 0dBm RF power from the VNA when the voltage on the 1V pad was set to 1.2V and voltage on 6V pad was set to 6V. The output RF signal amplitude and integrity depended on the bias of EIC. Applying 1.2V on the 1V pad was necessary to draw 52 mA at that node to match the current drawn in the case of the standalone EIC to ensure signal integrity [19]. In the integrated assembly, only 42 mA was drawn at a 1V bias. This indicates that the voltage drop on the 1V pad in the integrated assembly was lower than the applied bias. The RF cables and probe have been de-embedded, and the RF power was calibrated to ensure the VNA output signal was 0 dBm across the measurement frequency range (the EIC frequency response was power-dependent). The MZM DC pad was grounded during the S parameter measurement. The wavelength was set to 1552.4 nm, corresponding to the MZM quadrature point. Comparing Fig. 6(b) with Fig. 4(b), the EO S21 3dB bandwidth was only slightly compromised to 24 GHz after flip-chip bonding. This means the bandwidth of the integrated transmitter was limited by the flip-chip bonding interface. The input S11 in Fig. 6(a) should be compared to that of the standalone EIC in [19]. The flip-chip bonding only slightly degraded the S11 at low frequency (from <-20dB increased to >-15dB).
Fig. 6 The (a) S11 and (b) EO S21 of the integrated assembly. The output RF power of the VNA was 0 dBm.
4.2 Eye diagram measurements
Lastly, we characterized the 3D EO transmitter with eye diagram measurements by applying a 231-1 pseudo-random bit sequence (PRBS) from a pattern generator (SHF 78210D, 12104A) at the EIC input and capturing the optical output using a digital communication analyzer (DCA) (Agilent 86100C with 86106B module, or Agilent 86100D DCA with 86118A module and a 50GHz photodetector). An erbium doped fiber amplifier (EDFA) with a tunable bandpass filter (with a 0.8 nm bandwidth) was used to optically amplify the output optical signal from the chip. The input wavelength to the Si MZM was set to the quadrature point of the device.
Figure 7(a) shows 30Gbps operation (taken with the 86106B DCA module), and the voltages on 6V and 1V supplies on the EIC were set to 5 V and 1 V, respectively, and the voltage swing of the input PRBS pattern was 0.5 Vpp. The actual voltage at the EIC 1V supply pad was likely less than 1 V, which led to degradation in the signal integrity. As evidenced in Fig. 7(a), while an ER of 7.68 dB was achieved, the “0” and “1” levels were not flat. For operation at higher bit rates, the bias voltages for the EIC were increased to improve signal integrity, and the input signal amplitude was increased as well to compensate for losses due to the probe, cables, and on-chip interconnect and to saturate the gain of the EIC. The voltages on the 6V and 1V supplies were set to 6 V and 1.2 V, and the voltage swing of the pattern generator was increased to 1 Vpp. These bias conditions are the same as Fig. 6. Figures 7(b)-7(d) show the measured eye diagrams at 36, 40, and 44 Gbps (taken with the 86118A DCA module and a 50GHz photodetector). The eyes remained open at up to 44 Gbps. The ER varied from 7.2 dB to 6.4 dB between 36 and 44 Gbps. The device IL, i.e., the loss of the MZM at the ‘1’ level accounting for the propagation loss and voltage swing, was 7.8 dB.
Fig. 7 Measured output eye diagrams of the integrated assembly for a PRBS31 pattern at (a) 30, (b) 36, (c) 40 and (d) 44 Gbps.
5. Discussion
The power consumption of the EO transmitter assembly (without the laser) can be determined from the currents at the voltage supplies to the EIC. For 44 Gbps operation, the currents drawn by the 6 V and 1.2 V biases were 60.09 mA and 41.82 mA, respectively, resulting in a power consumption of 410 mW. The power consumption was higher than that reported in [19], which was 300 mW at around 50Gbps operation, because an additional DC current flowed from the output of the driver through the 50 Ω termination resistor of the modulator to ground. Since the output of the EIC was DC-coupled, the output voltage had a DC offset of about -Vpp/2, leading to the current between the MZM signal and ground pads through the termination resistor. This DC offset further prevented the MZM to be operated in true push-pull mode; i.e., only the upper PN diode phase-shifter in Fig. 2 was in reverse bias when the center DC bias pad was held at ground. The measurement results in Section 4 were obtained with the DC pad held at ground. Future iterations of the EO transmitter would use an AC-coupled EIC to reduce the power consumption.
Nonetheless, the 3D integrated assembly demonstrated here has shown excellent performance relative to previous works. Table 1 compares flip-chip bonded Si MZM EO-transmitters. All the entries in the table do not include the power consumption of the laser and possible thermo-optic phase tuners. Based on previous measurements, the N-doped Si thermo-optic phase tuner in our device has a power efficiency, as quantified by the power required to create a π-phase shift, Pπ, of about 35 mW [24, 25]. However, the tuning efficiency can be much higher by using thermal isolation trenches and/or Si undercuts, which were not available in the fabrication process this time. For example, thin film thermal tuners with Pπ ranging from 14 mW to 0.5 mW have been demonstrated [26, 27]. Therefore, thermal tuning to set the bias is not necessarily a major contributor to the power consumption of the Si MZM transmitter.
Table 1. Comparison of Performance of 3D integrated Si MZM EO Transmitters
Table 1 shows that prior demonstrations using BiCMOS technology for drivers only led to dynamic ER < 3 dB. CMOS drivers, though lower in their power dissipation, only operated at up to 25 Gbps. Our demonstration achieves the highest ER at > 40 Gbps and is the first 3D integrated transmitter to use a CMOS driver at > 40 Gbps. The power consumption of our assembly, excluding the laser and thermal tuner, was about 410 mW, equivalent to an energy consumption of 9.3 pJ/bit. Including a typical, uncooled distributed feedback laser diode (DFB-LD) would add about 150 mW to the power consumption [16, 29]. This would be equivalent to an energy consumption of of 12.7 pJ/bit at 44 Gbps, which is lower than directly modulated DFB-LD (16.2 pJ/bit [30]) and similar to directly modulated VCSELs (12.2 pJ/bit [31]) at similar bit rates. Since the power consumption of the CMOS driver is proportional to the output voltage swing and supply voltage, the power consumption of the transmitter can be reduced at the expense of a lower voltage swing and ER.
6. Conclusion
In summary, we have demonstrated a 3D integrated EO transmitter consisting of a Si travelling-wave MZM and a 28nm UTBB FD-SOI CMOS amplifier. The Si MZM had a 3dB bandwidth of 25.5 GHz, an average VπL of 2.5 V·cm, and exhibited good impedance matching to 50 Ω. The integrated transmitter had a 3dB bandwidth of 24 GHz and operated at up to 44 Gbps with a record ER of 6.4 dB at the quadrature point of the MZM. The MZM IL was 7.8 dB. The high ER and low IL were enabled by the high voltage output swing of the EIC. The integration slightly compromised the output signal integrity of the electronic amplifier, which was compensated for using higher supply and input voltages. This work shows the potential of using CMOS drivers for Si MZMs requiring high drive voltage swings near 5 Vpp.
Funding
The fabrication of the electronic and photonic chips was sponsored by CMC Microsystems. The financial support of the Natural Sciences and Engineering Research Council of Canada and the University of Toronto Connaught Innovation Award are gratefully acknowledged. Z. Y. and J. K. S. P. acknowledge the financial support of Huawei Canada during the measurement phase of the project.
Acknowledgments
Z. Y. and J. K. S. P. thank Chaoxuan Ma for her help on the data for the power consumption of thermal tuner.
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